4K SMPTE Standard Outputs

[Trevor Childs]

>
>  And what is the hardware you are trying to setup?
>
 The recorder is an Atomos Shogun Inferno. It has HDMI 2.1 as well as quad
SDI inputs.

 How pixel clock is defined there? With ~300 kHz steps?
>
Pixel clock is defined as a number of picoseconds.


>  What modelines got you 60.02 and 59.98 Hz?
>
The modeline for 60.02Hz is:
"3840x2160"   594.18   3840 4016 4104 4400   2160 2168 2178 2250
Though it should be noted that the clock value in modelines (594.18 in the
line above) is actually converted and rounded to a picosecond value as
ROUND(1000000 / [modeline clock]). In this case the actual pixel clock is
1683ps.


>  Btw, if they are really close to 60.02 and 59.98, than one step down
> should be around 59.94.
>
None of the nearby values result in a good refresh rate:
1682ps - 60.05Hz
1683ps - 60.02Hz
1684ps - 59.98Hz
1685ps - 59.95Hz
1686ps - 59.91Hz

 It would be a bit strange to create recorder that can synchronize to 60
> and 59.94,
> but cannot on other +-0.5% errors.
>
Conforming to SMPTE standards is the norm for recording / production
equipment.
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