[ANNOUNCE] xf86-video-intel

Zhenyu Wang zhenyu.z.wang at intel.com
Sun Apr 13 19:12:48 PDT 2008

Here's (2.3-rc3) release. 
I believe this is the last rc cycle before 2.3 final, that will hit
Xorg-7.4 release. 

Please help to test and send us any problem as usual. Thanks!


Bryce Harrington (1):
      Quirks from Ubuntu/Dell

David Schleef (1):
      Bug #15219: Fix default overlay CSC factors, and use BT709 if available.

Eric Anholt (1):
      Fix compiler warning from 24-bit lvds change.

Hong Liu (1):
      Bug #14935: Fix i9xx reference clock for spread spectrum.

Jesse Barnes (1):
      Fix LVDS regression

Keith Packard (22):
      Compute du/dv/dw in no-mask SF prog
      Clarify comment in exa_sf program
      Reimplement wm program for nomask case to handle affine transforms
      Fix the sf_mask program to compute and pass corrected uvw cooefficients
      Remove rotation sf and wm progs
      Use m4 to clean up gen4 asm progs. Start adding projective transform support.
      Dont set the compr bit on 8-unit sends
      Back to new shaders, fix urb read length
      remove old monolithic shaders
      remove old monolithic shaders
      remove old shader source files
      Fix composite with mask using new compositing thread code
      Shrink WM thread to 32 registers and 1024 scratch space.
      Add projective versions of the PS kernels
      Remove extra flushing
      Forgot to build exa_wm_src_sample_argb.g4b
      Rename src/mask/data registers to indicate channel
      Use symbolic names for channels in YUV code
      Remove sync after 965 video put.
      Remove .g4b files on clean
      Single memcpy when pitches align on planar image transfer
      Revert "remove '#line NUM ...' in macro process"

Mike Isely (1):
      Implement support for 24 bit pixel format

Zhenyu Wang (4):
      Include <stdint.h> in i810.h for integer types definition
      remove '#line NUM ...' in macro process
      Remove old sf/wm program from Makefile
      Bump version

git tag: xf86-video-intel-

MD5: 5d24ac31d1535ac975a62c35ea0cfbf2  xf86-video-intel-
SHA1: 015561128fbbf45037ebecdc019844429e2a00d5  xf86-video-intel-

MD5: 03e59cbb5a52805eb47ee20c274d9fce  xf86-video-intel-
SHA1: 478e3763cf96dbd0a71e47d984b6dfd5e477127f  xf86-video-intel-

Open Source Technology Center, Intel ltd.

$gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
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