915gm/945gm/XAA lockup with gray blocks when switching video mode

[Peter Clifton]

On Fri, 2007-10-12 at 05:58 -0700, Jesse Barnes wrote:
> On Thursday, October 11, 2007 9:43 pm Bryce Harrington wrote:
> > I tried adding a usleep(20) inside the loops, but the issue still
> > came up (seemed like it took more attempts than normal to trigger,
> > but that is hard to judge).
> >
> > I'll also try replacing the pallet restore loops.
> >
> > Could you also explain a bit more about what this pallet is?
> 
> Err, I meant palette. :)  It's just a guess, but it seems like banging 
> on those registers causes problems for some people, but only some of 
> the time.  This may be because you just happen to hit the issue during 
> those PIOs or because the PIOs themselves are causing a problem 
> somehow.  The latter might be due to the associated pipe being off, 
> which would disable the registers, possibly causing a GPU crash when 
> you wrote them (the fact that your crashes go away 100% points to this 
> possibility).  The former would be some other problem probably caused 
> by earlier code that we just happen to hit when doing the palette 
> restoration...  putting delays before palette restore might confirm or 
> deny that theory.

The following fixes it for me at least:

--- xserver-xorg-video-intel-2.1.1.orig/src/i830_driver.c	2007-10-12 14:37:57.000000000 +0100
+++ xserver-xorg-video-intel-2.1.1/src/i830_driver.c	2007-10-12 14:39:08.000000000 +0100
@@ -1985,11 +1985,12 @@
    OUTREG(VCLK_DIVISOR_VGA1, pI830->saveVCLK_DIVISOR_VGA1);
    OUTREG(VCLK_POST_DIV, pI830->saveVCLK_POST_DIV);
 
-   for(i = 0; i < 256; i++) {
-      OUTREG(PALETTE_A + (i << 2), pI830->savePaletteA[i]);
+   if ((INREG(PIPEACONF) & PIPEACONF_ENABLE)) {
+      for(i = 0; i < 256; i++) {
+         OUTREG(PALETTE_A + (i << 2), pI830->savePaletteA[i]);
+      }
    }
-   
-   if(xf86_config->num_crtc == 2) {
+   if (xf86_config->num_crtc == 2 && (INREG(PIPEBCONF) & PIPEBCONF_ENABLE)) {
       for(i= 0; i < 256; i++) {
          OUTREG(PALETTE_B + (i << 2), pI830->savePaletteB[i]);
       }

Comments?


-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)