R500 initial driver release announcement

Jerome Glisse j.glisse at gmail.com
Mon Jun 18 01:13:54 PDT 2007


On 6/18/07, Nathanael D. Noblet <nathanael at gnat.ca> wrote:
> Jerome Glisse wrote:
> > It seems it fail to set pll at least the log doesn't show the pll line which
> > should be right after mode line at the end. Try after fglrx run and make
> > sure you removed fglrx kernel module before starting with avivo (i am
> > not sure this can cause problem).
>
> I've updated to the latest sources and it is much closer. I have a dual
> screen setup. Only one monitor is detected, the other complains about
> being 'out of range' so something there isn't working. The two screens
> are both 19" Benq LCDs native resolutions of 1280 x 1024, DVI. (Just
> incase any of the details matter). What does come up is a pretty messed
> up display on the one side.
>
> How do I describe this...? It covers the top two thirds of the screen,
> however it is shifted right so that if my mouse leaves the far right
> edge of the screen it re-appears on the left side and continues for the
> rest of the 1/3rd of the screen. Though the colors are fine, and I can
> see some of the default Gnome icons. I can't reach or see any menu bars,
> moving the mouse to the top/bottom edge of the screen doesn't do
> anything, the cursor doesn't leave the edge, nor does the display pan
> around. The display is flicker free and no odd coloring. Attached is the
>   Xorg log file and the git diff for my changes to the IDs. Let me know
> what else to do to help out. If you care to see the vesa xorg output let
> me know.
>
> Thanks for all the hard work, and to re-iterate, I would enjoy helping
> this come about if there are things that need doing, just let me know.
>
> (II) Avivo(0): crtc(0) hdisp 1280, htotal 1688, hss 1328, hse 1440, hsk 0
> (II) Avivo(0): crtc(0) vdisp 1024, vtotal 1066, vss 1025, vse 1028, vsc 0
> (II) Avivo(0): crtc(0) Clock: mode 108000, PLL 108108
> (II) Avivo(0): crtc(0) PLL  : div 9, pmul 0x19A0209B(429924507), pdiv 11930417

Waoo this PLL values are totally insane, i guess my computation of them
is totaly wrong an work well only on my low bandwidth monitor :) I will try
to understand why the code can let such value be programmed.

best,
Jerome Glisse



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