new radeon tiling patch

[Michel Dänzer]

On Sat, 2005-01-15 at 03:29 +0100, Roland Scheidegger wrote:
> 
> One question I still have though is regarding to the surface setup, I'm 
> actually not convinced the addresses are correct in all cases, because I 
> don't understand how all that address translation stuff works. So 
> currently the addresses which are used always start from 0 (which 
> usually is the framebuffer location), but I'm not so sure if that's 
> correct for instance for igps regarding how this looks to the gpu.

There's no difference between IGP and non-IGP, this simply isn't correct
with recent DDX and DRM. The location of the framebuffer as seen by the
GPU needs is defined by MC_FB_LOCATION. All current components have
fields named along the lines of ...->fbLocation for that.


-- 
Earthling Michel Dänzer      |     Debian (powerpc), X and DRI developer
Libre software enthusiast    |   http://svcs.affero.net/rm.php?r=daenzer