EXA support for nv driver

[Alan Cox]

On Gwe, 2005-08-26 at 16:58 +1000, Benjamin Herrenschmidt wrote:
> Mapping cacheable ? Hrm... I'm not sure that would work with many
> chipsets as I'm not sure they would trigger proper coherency protocol
> when beeing accessed by the card. I currently map them non-cacheable on
> Macs but it might be worth trying on some chipsets I suppose...

x86 requires your mappings for the same physical page are consistent, so
you have to be very careful how you view a block of pages. That said
there should be advantages in pulling pages out of the gart, processing
them cached, flusing the page to ram and then putting it back uncached
in the gart