[PATCH] Fix up displayWidth vs. virtualX confusion in radeon_setup_kernel_mem().

[Jerome Glisse]

On Wed, Jun 27, 2012 at 1:28 PM, Michel Dänzer <michel at daenzer.net> wrote:
> From: Michel Dänzer <michel.daenzer at amd.com>
>
> It was using the pitch (displayWidth) for the virtual width (virtualX). This
> prevented using page flipping in some cases, as displayWidth was already
> overaligned for virtualX, so the DRI2 front and back buffers ended up having
> a different pitch.
>
> Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
Reviewed-by: Jerome Glisse <jglisse at redhat.com>
> ---
>  src/radeon_kms.c |    6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/src/radeon_kms.c b/src/radeon_kms.c
> index b6c035d..c757e88 100644
> --- a/src/radeon_kms.c
> +++ b/src/radeon_kms.c
> @@ -1250,7 +1250,7 @@ static Bool radeon_setup_kernel_mem(ScreenPtr pScreen)
>        } else
>            tiling_flags |= RADEON_TILING_MACRO;
>     }
> -    pitch = RADEON_ALIGN(pScrn->displayWidth, drmmode_get_pitch_align(pScrn, cpp, tiling_flags)) * cpp;
> +    pitch = RADEON_ALIGN(pScrn->virtualX, drmmode_get_pitch_align(pScrn, cpp, tiling_flags)) * cpp;
>     screen_size = RADEON_ALIGN(pScrn->virtualY, drmmode_get_height_align(pScrn, tiling_flags)) * pitch;
>     base_align = drmmode_get_base_align(pScrn, cpp, tiling_flags);
>        if (info->ChipFamily >= CHIP_FAMILY_R600) {
> @@ -1260,7 +1260,7 @@ static Bool radeon_setup_kernel_mem(ScreenPtr pScreen)
>                        return FALSE;
>                }
>                memset(&surface, 0, sizeof(struct radeon_surface));
> -               surface.npix_x = pScrn->displayWidth;
> +               surface.npix_x = pScrn->virtualX;
>                surface.npix_y = pScrn->virtualY;
>                surface.npix_z = 1;
>                surface.blk_w = 1;
> @@ -1365,6 +1365,8 @@ static Bool radeon_setup_kernel_mem(ScreenPtr pScreen)
>             radeon_bo_set_tiling(info->front_bo, tiling_flags, pitch);
>     }
>
> +    info->CurrentLayout.displayWidth = pScrn->displayWidth = pitch / cpp;
> +
>     xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Front buffer size: %dK\n", info->front_bo->size/1024);
>     radeon_kms_update_vram_limit(pScrn, screen_size);
>     return TRUE;
> --
> 1.7.10
>
>
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