xf86-video-intel: 2 commits - src/intel_module.c

Chris Wilson ickle at kemper.freedesktop.org
Mon May 9 23:32:36 PDT 2011


 src/intel_module.c |  444 ++++++++++++++++++++++++++---------------------------
 1 file changed, 222 insertions(+), 222 deletions(-)

New commits:
commit fd1ebd44fb72e7bdf57d00f8941cd6110a529cac
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Tue May 10 07:30:58 2011 +0100

    module: Adopt IVB's more detailed naming convention for SNB
    
    This should fix the seven-fold repetition of "SandyBridge" in the list
    of supported chipsets during start-up... And be more useful in bug
    reports!
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/intel_module.c b/src/intel_module.c
index 4ea8731..9e302bb 100644
--- a/src/intel_module.c
+++ b/src/intel_module.c
@@ -113,18 +113,18 @@ static const SymTabRec _intel_chipsets[] = {
 	{PCI_CHIP_B43_G1,			"B43"},
 	{PCI_CHIP_IRONLAKE_D_G,			"Clarkdale"},
 	{PCI_CHIP_IRONLAKE_M_G,			"Arrandale"},
-	{PCI_CHIP_SANDYBRIDGE_GT1,		"Sandybridge" },
-	{PCI_CHIP_SANDYBRIDGE_GT2,		"Sandybridge" },
-	{PCI_CHIP_SANDYBRIDGE_GT2_PLUS,		"Sandybridge" },
-	{PCI_CHIP_SANDYBRIDGE_M_GT1,		"Sandybridge" },
-	{PCI_CHIP_SANDYBRIDGE_M_GT2,		"Sandybridge" },
-	{PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS,	"Sandybridge" },
-	{PCI_CHIP_SANDYBRIDGE_S_GT,		"Sandybridge" },
-	{PCI_CHIP_IVYBRIDGE_M_GT1,		"Ivybridge Mobile GT1" },
-	{PCI_CHIP_IVYBRIDGE_M_GT2,		"Ivybridge Mobile GT2" },
-	{PCI_CHIP_IVYBRIDGE_D_GT1,		"Ivybridge Desktop GT1" },
-	{PCI_CHIP_IVYBRIDGE_D_GT2,		"Ivybridge Desktop GT2" },
-	{PCI_CHIP_IVYBRIDGE_S_GT1,		"Ivybridge Server GT1" },
+	{PCI_CHIP_SANDYBRIDGE_GT1,		"Sandybridge Desktop (GT1)" },
+	{PCI_CHIP_SANDYBRIDGE_GT2,		"Sandybridge Desktop (GT2)" },
+	{PCI_CHIP_SANDYBRIDGE_GT2_PLUS,		"Sandybridge Desktop (GT2+)" },
+	{PCI_CHIP_SANDYBRIDGE_M_GT1,		"Sandybridge Mobile (GT1)" },
+	{PCI_CHIP_SANDYBRIDGE_M_GT2,		"Sandybridge Mobile (GT2)" },
+	{PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS,	"Sandybridge Mobile (GT2+)" },
+	{PCI_CHIP_SANDYBRIDGE_S_GT,		"Sandybridge Server" },
+	{PCI_CHIP_IVYBRIDGE_M_GT1,		"Ivybridge Mobile (GT1)" },
+	{PCI_CHIP_IVYBRIDGE_M_GT2,		"Ivybridge Mobile (GT2)" },
+	{PCI_CHIP_IVYBRIDGE_D_GT1,		"Ivybridge Desktop (GT1)" },
+	{PCI_CHIP_IVYBRIDGE_D_GT2,		"Ivybridge Desktop (GT2)" },
+	{PCI_CHIP_IVYBRIDGE_S_GT1,		"Ivybridge Server" },
 	{-1,					NULL}
 };
 SymTabRec *intel_chipsets = (SymTabRec *) _intel_chipsets;
commit e9811bb777dfc51af19836175645400489f7d991
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Tue May 10 07:28:23 2011 +0100

    Whitespacing cleanup for intel_module.c
    
    Bring intel_module.c into line with the kernel whitespacing rules abided
    by everywhere else in the tree.
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/intel_module.c b/src/intel_module.c
index 6aeaeeb..4ea8731 100644
--- a/src/intel_module.c
+++ b/src/intel_module.c
@@ -78,54 +78,54 @@ static const struct intel_device_info intel_ivybridge_info = {
 };
 
 static const SymTabRec _intel_chipsets[] = {
-    {PCI_CHIP_I810,		"i810"},
-    {PCI_CHIP_I810_DC100,	"i810-dc100"},
-    {PCI_CHIP_I810_E,		"i810e"},
-    {PCI_CHIP_I815,		"i815"},
-    {PCI_CHIP_I830_M,		"i830M"},
-    {PCI_CHIP_845_G,		"845G"},
-    {PCI_CHIP_I854,		"854"},
-    {PCI_CHIP_I855_GM,		"852GM/855GM"},
-    {PCI_CHIP_I865_G,		"865G"},
-    {PCI_CHIP_I915_G,		"915G"},
-    {PCI_CHIP_E7221_G,		"E7221 (i915)"},
-    {PCI_CHIP_I915_GM,		"915GM"},
-    {PCI_CHIP_I945_G,		"945G"},
-    {PCI_CHIP_I945_GM,		"945GM"},
-    {PCI_CHIP_I945_GME,		"945GME"},
-    {PCI_CHIP_PINEVIEW_M,	"Pineview GM"},
-    {PCI_CHIP_PINEVIEW_G,	"Pineview G"},
-    {PCI_CHIP_I965_G,		"965G"},
-    {PCI_CHIP_G35_G,		"G35"},
-    {PCI_CHIP_I965_Q,		"965Q"},
-    {PCI_CHIP_I946_GZ,		"946GZ"},
-    {PCI_CHIP_I965_GM,		"965GM"},
-    {PCI_CHIP_I965_GME,		"965GME/GLE"},
-    {PCI_CHIP_G33_G,		"G33"},
-    {PCI_CHIP_Q35_G,		"Q35"},
-    {PCI_CHIP_Q33_G,		"Q33"},
-    {PCI_CHIP_GM45_GM,		"GM45"},
-    {PCI_CHIP_G45_E_G,		"4 Series"},
-    {PCI_CHIP_G45_G,		"G45/G43"},
-    {PCI_CHIP_Q45_G,		"Q45/Q43"},
-    {PCI_CHIP_G41_G,		"G41"},
-    {PCI_CHIP_B43_G,		"B43"},
-    {PCI_CHIP_B43_G1,		"B43"},
-    {PCI_CHIP_IRONLAKE_D_G,		"Clarkdale"},
-    {PCI_CHIP_IRONLAKE_M_G,		"Arrandale"},
-    {PCI_CHIP_SANDYBRIDGE_GT1,	"Sandybridge" },
-    {PCI_CHIP_SANDYBRIDGE_GT2,	"Sandybridge" },
-    {PCI_CHIP_SANDYBRIDGE_GT2_PLUS,	"Sandybridge" },
-    {PCI_CHIP_SANDYBRIDGE_M_GT1,	"Sandybridge" },
-    {PCI_CHIP_SANDYBRIDGE_M_GT2,	"Sandybridge" },
-    {PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS,	"Sandybridge" },
-    {PCI_CHIP_SANDYBRIDGE_S_GT,	"Sandybridge" },
-    {PCI_CHIP_IVYBRIDGE_M_GT1,	"Ivybridge Mobile GT1" },
-    {PCI_CHIP_IVYBRIDGE_M_GT2,	"Ivybridge Mobile GT2" },
-    {PCI_CHIP_IVYBRIDGE_D_GT1,	"Ivybridge Desktop GT1" },
-    {PCI_CHIP_IVYBRIDGE_D_GT2,	"Ivybridge Desktop GT2" },
-    {PCI_CHIP_IVYBRIDGE_S_GT1,	"Ivybridge Server GT1" },
-    {-1,				NULL}
+	{PCI_CHIP_I810,				"i810"},
+	{PCI_CHIP_I810_DC100,			"i810-dc100"},
+	{PCI_CHIP_I810_E,			"i810e"},
+	{PCI_CHIP_I815,				"i815"},
+	{PCI_CHIP_I830_M,			"i830M"},
+	{PCI_CHIP_845_G,			"845G"},
+	{PCI_CHIP_I854,				"854"},
+	{PCI_CHIP_I855_GM,			"852GM/855GM"},
+	{PCI_CHIP_I865_G,			"865G"},
+	{PCI_CHIP_I915_G,			"915G"},
+	{PCI_CHIP_E7221_G,			"E7221 (i915)"},
+	{PCI_CHIP_I915_GM,			"915GM"},
+	{PCI_CHIP_I945_G,			"945G"},
+	{PCI_CHIP_I945_GM,			"945GM"},
+	{PCI_CHIP_I945_GME,			"945GME"},
+	{PCI_CHIP_PINEVIEW_M,			"Pineview GM"},
+	{PCI_CHIP_PINEVIEW_G,			"Pineview G"},
+	{PCI_CHIP_I965_G,			"965G"},
+	{PCI_CHIP_G35_G,			"G35"},
+	{PCI_CHIP_I965_Q,			"965Q"},
+	{PCI_CHIP_I946_GZ,			"946GZ"},
+	{PCI_CHIP_I965_GM,			"965GM"},
+	{PCI_CHIP_I965_GME,			"965GME/GLE"},
+	{PCI_CHIP_G33_G,			"G33"},
+	{PCI_CHIP_Q35_G,			"Q35"},
+	{PCI_CHIP_Q33_G,			"Q33"},
+	{PCI_CHIP_GM45_GM,			"GM45"},
+	{PCI_CHIP_G45_E_G,			"4 Series"},
+	{PCI_CHIP_G45_G,			"G45/G43"},
+	{PCI_CHIP_Q45_G,			"Q45/Q43"},
+	{PCI_CHIP_G41_G,			"G41"},
+	{PCI_CHIP_B43_G,			"B43"},
+	{PCI_CHIP_B43_G1,			"B43"},
+	{PCI_CHIP_IRONLAKE_D_G,			"Clarkdale"},
+	{PCI_CHIP_IRONLAKE_M_G,			"Arrandale"},
+	{PCI_CHIP_SANDYBRIDGE_GT1,		"Sandybridge" },
+	{PCI_CHIP_SANDYBRIDGE_GT2,		"Sandybridge" },
+	{PCI_CHIP_SANDYBRIDGE_GT2_PLUS,		"Sandybridge" },
+	{PCI_CHIP_SANDYBRIDGE_M_GT1,		"Sandybridge" },
+	{PCI_CHIP_SANDYBRIDGE_M_GT2,		"Sandybridge" },
+	{PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS,	"Sandybridge" },
+	{PCI_CHIP_SANDYBRIDGE_S_GT,		"Sandybridge" },
+	{PCI_CHIP_IVYBRIDGE_M_GT1,		"Ivybridge Mobile GT1" },
+	{PCI_CHIP_IVYBRIDGE_M_GT2,		"Ivybridge Mobile GT2" },
+	{PCI_CHIP_IVYBRIDGE_D_GT1,		"Ivybridge Desktop GT1" },
+	{PCI_CHIP_IVYBRIDGE_D_GT2,		"Ivybridge Desktop GT2" },
+	{PCI_CHIP_IVYBRIDGE_S_GT1,		"Ivybridge Server GT1" },
+	{-1,					NULL}
 };
 SymTabRec *intel_chipsets = (SymTabRec *) _intel_chipsets;
 
@@ -133,85 +133,85 @@ SymTabRec *intel_chipsets = (SymTabRec *) _intel_chipsets;
     { 0x8086, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0, 0, (intptr_t)(i) }
 
 static const struct pci_id_match intel_device_match[] = {
-    INTEL_DEVICE_MATCH (PCI_CHIP_I810, &intel_i81x_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_I810_DC100, &intel_i81x_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_I810_E, &intel_i81x_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_I815, &intel_i81x_info ),
-
-    INTEL_DEVICE_MATCH (PCI_CHIP_I830_M, &intel_i8xx_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_845_G, &intel_i8xx_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_I854, &intel_i8xx_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_I855_GM, &intel_i8xx_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_I865_G, &intel_i8xx_info ),
-
-    INTEL_DEVICE_MATCH (PCI_CHIP_I915_G, &intel_i915_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_E7221_G, &intel_i915_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_I915_GM, &intel_i915_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_I945_G, &intel_i915_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_I945_GM, &intel_i915_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_I945_GME, &intel_i915_info ),
-
-    INTEL_DEVICE_MATCH (PCI_CHIP_G33_G, &intel_g33_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_PINEVIEW_M, &intel_g33_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_PINEVIEW_G, &intel_g33_info ),
-
-    INTEL_DEVICE_MATCH (PCI_CHIP_I965_G, &intel_i965_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_G35_G, &intel_i965_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_I965_Q, &intel_i965_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_I946_GZ, &intel_i965_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_I965_GM, &intel_i965_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_I965_GME, &intel_i965_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_Q35_G, &intel_i965_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_Q33_G, &intel_i965_info ),
-
-    INTEL_DEVICE_MATCH (PCI_CHIP_GM45_GM, &intel_g4x_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_G45_E_G, &intel_g4x_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_G45_G, &intel_g4x_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_Q45_G, &intel_g4x_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_G41_G, &intel_g4x_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_B43_G, &intel_g4x_info ),
-
-    INTEL_DEVICE_MATCH (PCI_CHIP_IRONLAKE_D_G, &intel_ironlake_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_IRONLAKE_M_G, &intel_ironlake_info ),
-
-    INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_GT1, &intel_sandybridge_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_GT2, &intel_sandybridge_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_GT2_PLUS, &intel_sandybridge_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_GT1, &intel_sandybridge_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_GT2, &intel_sandybridge_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS, &intel_sandybridge_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_S_GT, &intel_sandybridge_info ),
-
-
-    INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_M_GT1, &intel_ivybridge_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_M_GT2, &intel_ivybridge_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_D_GT1, &intel_ivybridge_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_D_GT2, &intel_ivybridge_info ),
-    INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_S_GT1, &intel_ivybridge_info ),
-
-    { 0, 0, 0 },
+	INTEL_DEVICE_MATCH (PCI_CHIP_I810, &intel_i81x_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_I810_DC100, &intel_i81x_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_I810_E, &intel_i81x_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_I815, &intel_i81x_info ),
+
+	INTEL_DEVICE_MATCH (PCI_CHIP_I830_M, &intel_i8xx_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_845_G, &intel_i8xx_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_I854, &intel_i8xx_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_I855_GM, &intel_i8xx_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_I865_G, &intel_i8xx_info ),
+
+	INTEL_DEVICE_MATCH (PCI_CHIP_I915_G, &intel_i915_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_E7221_G, &intel_i915_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_I915_GM, &intel_i915_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_I945_G, &intel_i915_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_I945_GM, &intel_i915_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_I945_GME, &intel_i915_info ),
+
+	INTEL_DEVICE_MATCH (PCI_CHIP_G33_G, &intel_g33_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_PINEVIEW_M, &intel_g33_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_PINEVIEW_G, &intel_g33_info ),
+
+	INTEL_DEVICE_MATCH (PCI_CHIP_I965_G, &intel_i965_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_G35_G, &intel_i965_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_I965_Q, &intel_i965_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_I946_GZ, &intel_i965_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_I965_GM, &intel_i965_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_I965_GME, &intel_i965_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_Q35_G, &intel_i965_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_Q33_G, &intel_i965_info ),
+
+	INTEL_DEVICE_MATCH (PCI_CHIP_GM45_GM, &intel_g4x_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_G45_E_G, &intel_g4x_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_G45_G, &intel_g4x_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_Q45_G, &intel_g4x_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_G41_G, &intel_g4x_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_B43_G, &intel_g4x_info ),
+
+	INTEL_DEVICE_MATCH (PCI_CHIP_IRONLAKE_D_G, &intel_ironlake_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_IRONLAKE_M_G, &intel_ironlake_info ),
+
+	INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_GT1, &intel_sandybridge_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_GT2, &intel_sandybridge_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_GT2_PLUS, &intel_sandybridge_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_GT1, &intel_sandybridge_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_GT2, &intel_sandybridge_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS, &intel_sandybridge_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_S_GT, &intel_sandybridge_info ),
+
+
+	INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_M_GT1, &intel_ivybridge_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_M_GT2, &intel_ivybridge_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_D_GT1, &intel_ivybridge_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_D_GT2, &intel_ivybridge_info ),
+	INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_S_GT1, &intel_ivybridge_info ),
+
+	{ 0, 0, 0 },
 };
 
 void intel_detect_chipset(ScrnInfoPtr scrn,
 			  struct pci_device *pci,
 			  struct intel_chipset *chipset)
 {
-    int i;
-
-    chipset->info = chipset_info;
-
-    for (i = 0; intel_chipsets[i].name != NULL; i++) {
-	    if (DEVICE_ID(pci) == intel_chipsets[i].token) {
-		    chipset->name = intel_chipsets[i].name;
-		    break;
-	    }
-    }
-    if (intel_chipsets[i].name == NULL) {
-	    chipset->name = "unknown chipset";
-    }
-
-    xf86DrvMsg(scrn->scrnIndex, X_INFO,
-	       "Integrated Graphics Chipset: Intel(R) %s\n", chipset->name);
+	int i;
+
+	chipset->info = chipset_info;
+
+	for (i = 0; intel_chipsets[i].name != NULL; i++) {
+		if (DEVICE_ID(pci) == intel_chipsets[i].token) {
+			chipset->name = intel_chipsets[i].name;
+			break;
+		}
+	}
+	if (intel_chipsets[i].name == NULL) {
+		chipset->name = "unknown chipset";
+	}
+
+	xf86DrvMsg(scrn->scrnIndex, X_INFO,
+		   "Integrated Graphics Chipset: Intel(R) %s\n", chipset->name);
 }
 
 /*
@@ -222,30 +222,30 @@ void intel_detect_chipset(ScrnInfoPtr scrn,
  */
 static void intel_identify(int flags)
 {
-    xf86PrintChipsets(INTEL_NAME,
-		      "Driver for Intel Integrated Graphics Chipsets",
-		      intel_chipsets);
+	xf86PrintChipsets(INTEL_NAME,
+			  "Driver for Intel Integrated Graphics Chipsets",
+			  intel_chipsets);
 }
 
 static Bool intel_driver_func(ScrnInfoPtr pScrn,
 			      xorgDriverFuncOp op,
 			      pointer ptr)
 {
-    xorgHWFlags *flag;
+	xorgHWFlags *flag;
 
-    switch (op) {
-    case GET_REQUIRED_HW_INTERFACES:
-	flag = (CARD32*)ptr;
+	switch (op) {
+	case GET_REQUIRED_HW_INTERFACES:
+		flag = (CARD32*)ptr;
 #ifdef KMS_ONLY
-	(*flag) = 0;
+		(*flag) = 0;
 #else
-	(*flag) = HW_IO | HW_MMIO;
+		(*flag) = HW_IO | HW_MMIO;
 #endif
-	return TRUE;
-    default:
-	/* Unknown or deprecated function */
-	return FALSE;
-    }
+		return TRUE;
+	default:
+		/* Unknown or deprecated function */
+		return FALSE;
+	}
 }
 
 static Bool has_kernel_mode_setting(struct pci_device *dev)
@@ -276,65 +276,65 @@ static Bool has_kernel_mode_setting(struct pci_device *dev)
  * Setup the dispatch table for the rest of the driver functions.
  *
  */
-static Bool intel_pci_probe (DriverPtr		driver,
-			     int		entity_num,
-			     struct pci_device	*device,
-			     intptr_t		match_data)
+static Bool intel_pci_probe(DriverPtr		driver,
+			    int			entity_num,
+			    struct pci_device	*device,
+			    intptr_t		match_data)
 {
-    ScrnInfoPtr scrn;
-    PciChipsets intel_pci_chipsets[ARRAY_SIZE(intel_chipsets)];
-    int i;
+	ScrnInfoPtr scrn;
+	PciChipsets intel_pci_chipsets[ARRAY_SIZE(intel_chipsets)];
+	int i;
 
-    chipset_info = (void *)match_data;
+	chipset_info = (void *)match_data;
 
-    if (!has_kernel_mode_setting(device)) {
+	if (!has_kernel_mode_setting(device)) {
 #if KMS_ONLY
-	    return FALSE;
+		return FALSE;
 #else
-	    switch (DEVICE_ID(device)) {
-	    case PCI_CHIP_I810:
-	    case PCI_CHIP_I810_DC100:
-	    case PCI_CHIP_I810_E:
-	    case PCI_CHIP_I815:
-		    break;
-	    default:
-		    return FALSE;
-	    }
+		switch (DEVICE_ID(device)) {
+		case PCI_CHIP_I810:
+		case PCI_CHIP_I810_DC100:
+		case PCI_CHIP_I810_E:
+		case PCI_CHIP_I815:
+			break;
+		default:
+			return FALSE;
+		}
 #endif
-    }
-
-    for (i = 0; i < ARRAY_SIZE(intel_chipsets); i++) {
-	    intel_pci_chipsets[i].numChipset = intel_chipsets[i].token;
-	    intel_pci_chipsets[i].PCIid = intel_chipsets[i].token;
-	    intel_pci_chipsets[i].dummy = NULL;
-    }
-
-    scrn = xf86ConfigPciEntity(NULL, 0, entity_num, intel_pci_chipsets,
-			       NULL, NULL, NULL, NULL, NULL);
-    if (scrn != NULL) {
-	scrn->driverVersion = INTEL_VERSION;
-	scrn->driverName = INTEL_DRIVER_NAME;
-	scrn->name = INTEL_NAME;
-	scrn->Probe = NULL;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(intel_chipsets); i++) {
+		intel_pci_chipsets[i].numChipset = intel_chipsets[i].token;
+		intel_pci_chipsets[i].PCIid = intel_chipsets[i].token;
+		intel_pci_chipsets[i].dummy = NULL;
+	}
+
+	scrn = xf86ConfigPciEntity(NULL, 0, entity_num, intel_pci_chipsets,
+				   NULL, NULL, NULL, NULL, NULL);
+	if (scrn != NULL) {
+		scrn->driverVersion = INTEL_VERSION;
+		scrn->driverName = INTEL_DRIVER_NAME;
+		scrn->name = INTEL_NAME;
+		scrn->Probe = NULL;
 
 #if KMS_ONLY
-	intel_init_scrn(scrn);
+		intel_init_scrn(scrn);
 #else
-	switch (DEVICE_ID(device)) {
-	case PCI_CHIP_I810:
-	case PCI_CHIP_I810_DC100:
-	case PCI_CHIP_I810_E:
-	case PCI_CHIP_I815:
-	    lg_i810_init(scrn);
-	    break;
-
-	default:
-	    intel_init_scrn(scrn);
-	    break;
-	}
+		switch (DEVICE_ID(device)) {
+		case PCI_CHIP_I810:
+		case PCI_CHIP_I810_DC100:
+		case PCI_CHIP_I810_E:
+		case PCI_CHIP_I815:
+			lg_i810_init(scrn);
+			break;
+
+		default:
+			intel_init_scrn(scrn);
+			break;
+		}
 #endif
-    }
-    return scrn != NULL;
+	}
+	return scrn != NULL;
 }
 
 #ifdef XFree86LOADER
@@ -342,16 +342,16 @@ static Bool intel_pci_probe (DriverPtr		driver,
 static MODULESETUPPROTO(intel_setup);
 
 static XF86ModuleVersionInfo intel_version = {
-    "intel",
-    MODULEVENDORSTRING,
-    MODINFOSTRING1,
-    MODINFOSTRING2,
-    XORG_VERSION_CURRENT,
-    INTEL_VERSION_MAJOR, INTEL_VERSION_MINOR, INTEL_VERSION_PATCH,
-    ABI_CLASS_VIDEODRV,
-    ABI_VIDEODRV_VERSION,
-    MOD_CLASS_VIDEODRV,
-    {0, 0, 0, 0}
+	"intel",
+	MODULEVENDORSTRING,
+	MODINFOSTRING1,
+	MODINFOSTRING2,
+	XORG_VERSION_CURRENT,
+	INTEL_VERSION_MAJOR, INTEL_VERSION_MINOR, INTEL_VERSION_PATCH,
+	ABI_CLASS_VIDEODRV,
+	ABI_VIDEODRV_VERSION,
+	MOD_CLASS_VIDEODRV,
+	{0, 0, 0, 0}
 };
 
 static const OptionInfoRec *
@@ -374,16 +374,16 @@ intel_available_options(int chipid, int busid)
 }
 
 static DriverRec intel = {
-    INTEL_VERSION,
-    INTEL_DRIVER_NAME,
-    intel_identify,
-    NULL,
-    intel_available_options,
-    NULL,
-    0,
-    intel_driver_func,
-    intel_device_match,
-    intel_pci_probe
+	INTEL_VERSION,
+	INTEL_DRIVER_NAME,
+	intel_identify,
+	NULL,
+	intel_available_options,
+	NULL,
+	0,
+	intel_driver_func,
+	intel_device_match,
+	intel_pci_probe
 };
 
 static pointer intel_setup(pointer module,
@@ -391,24 +391,24 @@ static pointer intel_setup(pointer module,
 			   int *errmaj,
 			   int *errmin)
 {
-    static Bool setupDone = 0;
-
-    /* This module should be loaded only once, but check to be sure.
-    */
-    if (!setupDone) {
-	setupDone = 1;
-	xf86AddDriver(&intel, module, HaveDriverFuncs);
-
-	/*
-	 * The return value must be non-NULL on success even though there
-	 * is no TearDownProc.
-	 */
-	return (pointer) 1;
-    } else {
-	if (errmaj)
-	    *errmaj = LDR_ONCEONLY;
-	return NULL;
-    }
+	static Bool setupDone = 0;
+
+	/* This module should be loaded only once, but check to be sure.
+	*/
+	if (!setupDone) {
+		setupDone = 1;
+		xf86AddDriver(&intel, module, HaveDriverFuncs);
+
+		/*
+		 * The return value must be non-NULL on success even though there
+		 * is no TearDownProc.
+		 */
+		return (pointer) 1;
+	} else {
+		if (errmaj)
+			*errmaj = LDR_ONCEONLY;
+		return NULL;
+	}
 }
 
 _X_EXPORT XF86ModuleData intelModuleData = { &intel_version, intel_setup, NULL };


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