[ANNOUNCE] xf86-video-intel 2.20.13

Chris Wilson chris at chris-wilson.co.uk
Sun Nov 11 08:25:38 PST 2012

Nothing but bug fixes. Many thanks to everyone who took the time to
report their issues, and for their help in improving the driver.

 * Sanity check the platform probe points to our expected i915 device

 * Prevent 16-bit overflow for computing the sample area to upload of
   sources for render operations

 * Clamp the drawable box for migration to prevent 16-bit overflow

 * Disable RandR hotplug events if Xinerama is enabled and thereby prevent
   a crash upon hotplug

 * Call ValidatePicture before attempting to flatten the alphamaps

 * Clip the trapezoid correctly if it ends on the boundary pixel

 * Make sure the pipeline choice is propagated to the scanline wait
   across a batch flush

 * Set the valid drawable box when choosing placement of BLT composite ops

 * Prevent use-after-free when promoting a partial-GPU bo to a full-GPU bo

 * gen4 opacity spans require the per-rectangle workaround

 * Prevent use of invalid damage pointers when redirecting rendering

Chris Wilson (46):
      sna: Move the source region to the CPU for a self-copy fallback CopyArea
      sna: Mark the to-be-damaged region first, then Process afterwards
      intel: Sanity check that the platform probes points to a i915.ko GEM device
      sna: Remove the unused inactive eviction
      sna: Use the FLUSH_TIMER as the only wakeup timer source
      sna: Only query the system time if we are processing timers
      sna: Refactor the common code to enable a timer
      sna: Tidy udev install/remove and add a couple of lines of DBG
      sna: Update DRI buffer if attached to the framebuffer for TearFree flips
      sna: Only disallow hw sprite scaling on Haswell
      sna: Beware 16-bit overflow when computing sample areas
      sna: Disable RandR hotplug events if Xinerama is enabled
      sna: Add missing ValidatePicture() for flattening alphamaps
      uxa: Drain the DRM event queue before server regeneration
      sna: Ensure that the trap is clipped if it ends within the boundary pixel
      sna: Clamp the drawable box to prevent int16 overflow
      sna: Add a few DBG tracepoints to screen init/fini
      sna: Fix a typo in a DBG
      sna: Prefer to use the GPU for uploads if continuing on the GPU
      sna: assert that the source is not the GTT mapping when uploading
      sna: Preserve mode if flushing before a scanline wait
      sna: Set a valid box when checking for GPU bo for BLT composite ops
      sna: Try to reduce ping-pong migration for intermixed render/legacy code paths
      sna/gen4+: Prefer GPU spans if the destination is active
      sna: Add a small delay during startup if another master is still active
      sna: Prevent use-after-free during partial move-to-gpu
      sna/gen4: Flush after pipelined pointer updates (inverted logic!)
      sna/gen4: Remove a couple of old, now redundant, w/a flushes
      sna/gen4: opacity spans requires the per-rectangle flush w/a
      sna: Abandon kernels that do not support execbuffer2
      Remove reliance on hard-coded DRI name
      sna: Support a fast no relocation changed path
      sna: Set the known offset for the batch as well
      sna: Experiment with using reloc.handle as an index into the execbuffer
      sna: Mark no-reloc write buffers
      xvmc: Use DRMINTEL_LIBS instead of hardcoding -ldrm_intel
      sna/gen4: Only 965gm suffers the !snoop restriction
      sna/gen2: Add a modicum of fallback DBG
      sna: Allow snooped buffers to be retained (and reused) between batches
      sna: Specify read/write domains for no-relocation fastpath
      sna: Fix use of uninitialised value in DBG
      sna/gen2: Fix use of uninitialised redirection
      sna: Flush pending rendering before enabling an output
      sna: Fix printing of uninitialied value in DBG
      sna: Filter out the full-damage marker when undoing redirection
      2.20.13 release

git tag: 2.20.13

MD5:  506c561ee562a15afc281d4c393fdf64  xf86-video-intel-2.20.13.tar.bz2
SHA1: 39c38f324f74967bd7cf9f7540017d12e1d462b2  xf86-video-intel-2.20.13.tar.bz2
SHA256: 0151104b58ff3509ecd05ac4ee2c5d81a78506c97afbed511fed6b263060dce3  xf86-video-intel-2.20.13.tar.bz2

MD5:  a1dcb12e10a6a82f1f9d783e1a999f44  xf86-video-intel-2.20.13.tar.gz
SHA1: 27f45add248e6e09d05bb63320dca30109c87261  xf86-video-intel-2.20.13.tar.gz
SHA256: 3a180dc9332edfa8f9f37634fb25af08cb950edca153c742bbc24b45187b5b60  xf86-video-intel-2.20.13.tar.gz

Chris Wilson, Intel Open Source Technology Centre
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