[Mesa-dev] [PATCH 2/3] radeonsi: add support for VegaM
Marek Olšák
maraeo at gmail.com
Tue Apr 17 22:14:52 UTC 2018
From: Marek Olšák <marek.olsak at amd.com>
---
include/pci_ids/radeonsi_pci_ids.h | 3 +++
src/amd/common/ac_llvm_util.c | 1 +
src/amd/common/ac_surface.c | 4 ++++
src/amd/common/amd_family.h | 1 +
src/gallium/drivers/radeonsi/si_get.c | 3 ++-
src/gallium/drivers/radeonsi/si_pipe.c | 1 +
src/gallium/drivers/radeonsi/si_shader.c | 1 +
src/gallium/drivers/radeonsi/si_state.c | 4 ++++
src/gallium/drivers/radeonsi/si_state_draw.c | 3 ++-
9 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/include/pci_ids/radeonsi_pci_ids.h b/include/pci_ids/radeonsi_pci_ids.h
index 62b130307a3..6386d21a19f 100644
--- a/include/pci_ids/radeonsi_pci_ids.h
+++ b/include/pci_ids/radeonsi_pci_ids.h
@@ -209,20 +209,23 @@ CHIPSET(0x98E4, STONEY)
CHIPSET(0x6980, POLARIS12)
CHIPSET(0x6981, POLARIS12)
CHIPSET(0x6985, POLARIS12)
CHIPSET(0x6986, POLARIS12)
CHIPSET(0x6987, POLARIS12)
CHIPSET(0x6995, POLARIS12)
CHIPSET(0x6997, POLARIS12)
CHIPSET(0x699F, POLARIS12)
+CHIPSET(0x694C, VEGAM)
+CHIPSET(0x694E, VEGAM)
+
CHIPSET(0x6860, VEGA10)
CHIPSET(0x6861, VEGA10)
CHIPSET(0x6862, VEGA10)
CHIPSET(0x6863, VEGA10)
CHIPSET(0x6864, VEGA10)
CHIPSET(0x6867, VEGA10)
CHIPSET(0x6868, VEGA10)
CHIPSET(0x687F, VEGA10)
CHIPSET(0x686C, VEGA10)
diff --git a/src/amd/common/ac_llvm_util.c b/src/amd/common/ac_llvm_util.c
index f3db1c5a4a4..5b52381a7f1 100644
--- a/src/amd/common/ac_llvm_util.c
+++ b/src/amd/common/ac_llvm_util.c
@@ -105,20 +105,21 @@ const char *ac_get_llvm_processor_name(enum radeon_family family)
case CHIP_CARRIZO:
return "carrizo";
case CHIP_FIJI:
return "fiji";
case CHIP_STONEY:
return "stoney";
case CHIP_POLARIS10:
return "polaris10";
case CHIP_POLARIS11:
case CHIP_POLARIS12:
+ case CHIP_VEGAM:
return "polaris11";
case CHIP_VEGA10:
case CHIP_VEGA12:
case CHIP_RAVEN:
return "gfx900";
default:
return "";
}
}
diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index 7558dd91e34..a23952717e3 100644
--- a/src/amd/common/ac_surface.c
+++ b/src/amd/common/ac_surface.c
@@ -124,20 +124,24 @@ static void addrlib_family_rev_id(enum radeon_family family,
*addrlib_revid = get_first(AMDGPU_POLARIS10_RANGE);
break;
case CHIP_POLARIS11:
*addrlib_family = FAMILY_VI;
*addrlib_revid = get_first(AMDGPU_POLARIS11_RANGE);
break;
case CHIP_POLARIS12:
*addrlib_family = FAMILY_VI;
*addrlib_revid = get_first(AMDGPU_POLARIS12_RANGE);
break;
+ case CHIP_VEGAM:
+ *addrlib_family = FAMILY_VI;
+ *addrlib_revid = get_first(AMDGPU_VEGAM_RANGE);
+ break;
case CHIP_VEGA10:
*addrlib_family = FAMILY_AI;
*addrlib_revid = get_first(AMDGPU_VEGA10_RANGE);
break;
case CHIP_VEGA12:
*addrlib_family = FAMILY_AI;
*addrlib_revid = get_first(AMDGPU_VEGA12_RANGE);
break;
case CHIP_RAVEN:
*addrlib_family = FAMILY_RV;
diff --git a/src/amd/common/amd_family.h b/src/amd/common/amd_family.h
index 285111f2a2a..6410368f2f8 100644
--- a/src/amd/common/amd_family.h
+++ b/src/amd/common/amd_family.h
@@ -85,20 +85,21 @@ enum radeon_family {
CHIP_HAWAII,
CHIP_MULLINS,
CHIP_TONGA,
CHIP_ICELAND,
CHIP_CARRIZO,
CHIP_FIJI,
CHIP_STONEY,
CHIP_POLARIS10,
CHIP_POLARIS11,
CHIP_POLARIS12,
+ CHIP_VEGAM,
CHIP_VEGA10,
CHIP_VEGA12,
CHIP_RAVEN,
CHIP_LAST,
};
enum chip_class {
CLASS_UNKNOWN = 0,
R300,
R400,
diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
index fb1c6eca135..cb28920bbed 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -64,24 +64,25 @@ const char *si_get_family_name(const struct si_screen *sscreen)
case CHIP_HAINAN: return "AMD HAINAN";
case CHIP_BONAIRE: return "AMD BONAIRE";
case CHIP_KAVERI: return "AMD KAVERI";
case CHIP_KABINI: return "AMD KABINI";
case CHIP_HAWAII: return "AMD HAWAII";
case CHIP_MULLINS: return "AMD MULLINS";
case CHIP_TONGA: return "AMD TONGA";
case CHIP_ICELAND: return "AMD ICELAND";
case CHIP_CARRIZO: return "AMD CARRIZO";
case CHIP_FIJI: return "AMD FIJI";
+ case CHIP_STONEY: return "AMD STONEY";
case CHIP_POLARIS10: return "AMD POLARIS10";
case CHIP_POLARIS11: return "AMD POLARIS11";
case CHIP_POLARIS12: return "AMD POLARIS12";
- case CHIP_STONEY: return "AMD STONEY";
+ case CHIP_VEGAM: return "AMD VEGAM";
case CHIP_VEGA10: return "AMD VEGA10";
case CHIP_VEGA12: return "AMD VEGA12";
case CHIP_RAVEN: return "AMD RAVEN";
default: return "AMD unknown";
}
}
static bool si_have_tgsi_compute(struct si_screen *sscreen)
{
/* Old kernels disallowed some register writes for SI
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 466546b76b7..8ebb20a4485 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -678,20 +678,21 @@ static bool si_init_gs_info(struct si_screen *sscreen)
case CHIP_TAHITI:
case CHIP_PITCAIRN:
case CHIP_VERDE:
case CHIP_BONAIRE:
case CHIP_HAWAII:
case CHIP_TONGA:
case CHIP_FIJI:
case CHIP_POLARIS10:
case CHIP_POLARIS11:
case CHIP_POLARIS12:
+ case CHIP_VEGAM:
sscreen->gs_table_depth = 32;
return true;
default:
return false;
}
}
static void si_handle_env_var_force_family(struct si_screen *sscreen)
{
const char *family = debug_get_option("SI_FORCE_FAMILY", NULL);
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 8c62d53e2ad..b4970f14e34 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -5456,20 +5456,21 @@ static void si_calculate_max_simd_waves(struct si_shader *shader)
unsigned num_inputs = shader->selector->info.num_inputs;
unsigned lds_increment = sscreen->info.chip_class >= CIK ? 512 : 256;
unsigned lds_per_wave = 0;
unsigned max_simd_waves;
switch (sscreen->info.family) {
/* These always have 8 waves: */
case CHIP_POLARIS10:
case CHIP_POLARIS11:
case CHIP_POLARIS12:
+ case CHIP_VEGAM:
max_simd_waves = 8;
break;
default:
max_simd_waves = 10;
}
/* Compute LDS usage for PS. */
switch (shader->selector->type) {
case PIPE_SHADER_FRAGMENT:
/* The minimum usage per wave is (num_inputs * 48). The maximum
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 3faf36f2470..b5fe6726b9a 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -4776,20 +4776,24 @@ static void si_set_raster_config(struct si_context *sctx, struct si_pm4_state *p
case CHIP_FIJI:
if (sscreen->info.cik_macrotile_mode_array[0] == 0x000000e8) {
/* old kernels with old tiling config */
raster_config = 0x16000012;
raster_config_1 = 0x0000002a;
} else {
raster_config = 0x3a00161a;
raster_config_1 = 0x0000002e;
}
break;
+ case CHIP_VEGAM:
+ raster_config = 0x3a00161a;
+ raster_config_1 = 0x0000002e;
+ break;
case CHIP_POLARIS10:
raster_config = 0x16000012;
raster_config_1 = 0x0000002a;
break;
case CHIP_POLARIS11:
case CHIP_POLARIS12:
raster_config = 0x16000012;
raster_config_1 = 0x00000000;
break;
case CHIP_TONGA:
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 96dfd93645d..81019e1a0ba 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -355,21 +355,22 @@ si_get_init_multi_vgt_param(struct si_screen *sscreen,
if (sscreen->has_distributed_tess) {
if (key->u.uses_gs) {
if (sscreen->info.chip_class <= VI)
partial_es_wave = true;
/* GPU hang workaround. */
if (sscreen->info.family == CHIP_TONGA ||
sscreen->info.family == CHIP_FIJI ||
sscreen->info.family == CHIP_POLARIS10 ||
sscreen->info.family == CHIP_POLARIS11 ||
- sscreen->info.family == CHIP_POLARIS12)
+ sscreen->info.family == CHIP_POLARIS12 ||
+ sscreen->info.family == CHIP_VEGAM)
partial_vs_wave = true;
} else {
partial_vs_wave = true;
}
}
}
/* This is a hardware requirement. */
if (key->u.line_stipple_enabled ||
(sscreen->debug_flags & DBG(SWITCH_ON_EOP))) {
--
2.17.0
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