[Mesa-dev] [PATCH] i965: Always use Y-tiled buffers on SKL+

[Chris Wilson]

On Mon, Apr 13, 2015 at 04:31:29PM +0200, Daniel Vetter wrote:
> On Sat, Apr 11, 2015 at 01:16:11PM -0700, Ben Widawsky wrote:
> > Starting with Skylake, the display engine is capable of scanning out from
> > Y-tiled buffers. As such, we can and should use Y-tiling for better efficiency.
> > 
> > Note that the buffer allocation done for mipmaps will already never allocate an
> > X-tiled buffer for GEN9.
> > 
> > Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> 
> You need a recent enough ddx to make use of Y-tiled buffers, which atm
> still doesn't yet exist. This would at least need some kind of handshake
> with the compositor to make sure it understands this, presuming I didn't
> miss something.

You can send Y-tiled buffers to the DDX. The problem is that the kernel
won't allow us to display them and so we will (and always have been)
copying from them.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre