[Intel-gfx] [PATCH 00/11] drm/i915: VLV display clock/phy stuff

[ville.syrjala at linux.intel.com]

From: Ville Syrjälä <ville.syrjala at linux.intel.com>

I was tring to see if the 200 MHz cdclk option would work on VLV, and also
whether the Vnn voltage drops in response to cdclk. Sadly neither seems be to
true on my VLV. Might be some other unit is keeping Vnn elevated. I need to
trawl the docs more to see if I can find some fuses somewhere so I could
see what are the min/max correesponding to the the min/max cdclk.

I have no explanation why the 200MHz cdclk doesn't work since the voltage
doesn't change, the CCK clock ratio looks correct, and the pixel clock doens't
seem to be a factor either (both 150Hz and 25MHz modes fail).

Given that my goal of using the 200MHz cdclk failed this series consists
mainly of cleanups and removal of duplicated code. There are some real
changes too however:
- use 200MHz cdclk when all pipes are off
- fix 320MHz vs. 333MHz cdclk confusion
- wait for cdclk change to happen when going for 400MHz
- fix Jesse's cmnlane side reset workaround

And finally I attempted to have the driver gate off all display clocks
when powering down the disp2d well. Sadly that didn't go so well either,
so the last patch is here just for future reference. Maybe someone can
figure out what we're actually supposed to do there, if anything.

Ville Syrjälä (11):
  drm/i915: Change vlv cdclk to use kHz units
  drm/i915: Give names to the CCK_DISPLAY_CLOCK_CONTROL bits
  drm/i915: Move vlv cdclk code to .get_display_clock_speed()
  drm/i915: Handle 320 vs. 333 MHz cdclk on vlv
  drm/i915: Use 200MHz cdclk on vlv when all pipes are off
  drm/i915: Wait for cdclk change to occure when going for 400MHz
  drm/i915: Warn if there's a cdclk change in progess
  drm/i915: Kill duplicated cdclk readout code from i2c
  drm/i915: Pull the cmnlane tricks into its own power well ops
  drm/i915: Move VLV cmnlane workaround to intel_power_domains_init_hw()
  drm/i915: Turn off clocks when disp2d is powered down

 drivers/gpu/drm/i915/i915_reg.h      |  10 ++
 drivers/gpu/drm/i915/intel_display.c | 129 ++++++++++++-----------
 drivers/gpu/drm/i915/intel_drv.h     |   5 +-
 drivers/gpu/drm/i915/intel_i2c.c     |  54 ----------
 drivers/gpu/drm/i915/intel_pm.c      | 198 ++++++++++++++++++++++++++---------
 5 files changed, 225 insertions(+), 171 deletions(-)

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1.8.5.5