[ANNOUNCE] xf86-video-intel 2.21.1

[Chris Wilson]

Release 2.21.1 (2013-02-10)
===========================
A fix for a potential GPU hang on 945gm (GMA3100) and earlier chipsets,
along with backporting SNA to the packages found in stable distributions
like Debian 6.0 (Squeeze).

 * Cleanup compilation warnings from deblint, thanks to Paul Menzel

 * Minor build improvements by Damien Lespiau.

 * Disable generating span geometry for non-rectilinear spans on gen4
   in order to work around and prevent one class of render corruption.

 * Prevent cache thrashing and severe performance degradation on LLC
   machines for streaming texture updates. However, note the effect was
   only observed on just one particular laptop.

 * Fix alignment of subsurface proxies for old chipsets.
   https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel

 * Repair build against Xorg-1.6 and contemporary packages.


Complete list of changes since 2.21.0
-------------------------------------

Chris Wilson (36):
      sna: Do not add the INPLACE hint if we have the ASYNC hint set
      sna: Drop bogus refcnt assertion during kgem_bo_retire()
      sna/gen4: Disable non-rectilinear GPU span compositing
      sna/gen4: Remove old single-thread SF w/a
      NEWS: Trivial typo s/utilile/utilise/
      man: Fix a typo s/debuging/debugging/
      intel: add more ValleyView PCI IDs
      sna: ValleyView uses the same scanline registers as SandyBridge
      test: Add a very basic blt benchmark
      sna: Tidy buffer allocation size assertions
      xvmc: Add the complementary XCB_CFLAGS
      configure: XvMC support is optional, so make failure to find xcb non-fatal
      sna: Make sure we always replace io buffers before inserting into the cache
      sna: Relax the buffer size assertion to only be larger than required
      sna: Handle mapped buffer allocation failure for LLC
      sna: Correctly handle failure to CPU map a new allocation
      sna: Flush our caches if we fail to mmap an object
      sna: Free the handle after pwrite buffer allocation failure
      intel: Becareful not to match UMS against future generations
      sna: Fallback to non-LLC paths after an allocation failure for an LLC buffer
      sna: Correctly align used buffers to the following page boundary
      sna: Only try the SRC fixup into the buffer if it is CPU mapped
      sna: Allow inplace uploads to utilise GTT on LLC machines
      sna: Force GTT readback if the GPU is wedged
      sna: Also assert that the GPU is not wedged before continuing a batch
      sna: Fixup an invalid assertion
      sna: Remove the bogus assertions on buffer domains
      sna/gen4: Split the have_render flag in separate prefer_gpu hints
      sna: Force the fallback path for unaccelerated randr damage
      sna/gen6: Use GT2 settings for both GT2 and GT2+
      sna: Randomly perturb 'wedged' to hunt for faults
      sna: Promote to GPU is only partially damaged on the CPU but busy on the GPU
      sna: Fix alignment of the base of partial buffers for pre-G33 chipsets
      sna: Backport to squeeze - Xorg-1.6, pixman-0.16, libdrm-2.4.21
      configure: Fix typo in checking for libdrm_intel
      sna: Reorder some includes so that compat-api.h comes after the headers it wraps

Damien Lespiau (3):
      build: Make autoreconf honour ACLOCAL_FLAGS
      build: Use $(AM_V_GEN) to silence the assembly of gen programs
      build: Make generation of gen code depend on intel-gen4asm

Paul Menzel (3):
      configure.ac: Do not include `xext` and `xfixes` in `XVMCLIB`
      NEWS: Fix a typo: a*n* inadvertent
      configure.ac: Split out XCB libraries from `XVMCLIB` into `XCB`

git tag: 2.21.1

http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.21.1.tar.bz2
MD5:  c9901fc73ce9ff74a079d4c6b4b4a43d  xf86-video-intel-2.21.1.tar.bz2
SHA1: fd5984868244962c9b0e40605987d2bdeb1fcf27  xf86-video-intel-2.21.1.tar.bz2
SHA256: 9145ac8a6df09cc35cd2322d09e0cf0c3b2ede701263b9a64581a7a55db7dbfc  xf86-video-intel-2.21.1.tar.bz2

http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.21.1.tar.gz
MD5:  1bed249ba34e19c61b7c7eefcfcda407  xf86-video-intel-2.21.1.tar.gz
SHA1: ddb95054374189c97195658a24398cc7b42f99a9  xf86-video-intel-2.21.1.tar.gz
SHA256: 8c0809fef924e5a509b30e9b75d430469143e0a13b904acc1a7af12dc42c783e  xf86-video-intel-2.21.1.tar.gz


-- 
Chris Wilson, Intel Open Source Technology Centre
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