i915 interlaced display, again

[Krzysztof Halasa]

Hi,

Now that the non-KMS support is gone, the following patches implement
interlaced mode display on i915 and similar hardware.
Tested on i915 + analog VGA, it would be worth checking if newer chips
(and which ones) still support interlaced mode.
The patches don't change the clock limits (minimums), i.e. they alone
won't make it output 720x576 PAL no 720x480 NTSC, but they will work
with modes like 1080i etc. (including GLX and textured Xvideo, not sure
about the overlay).

Comments?

For the kernel (against v2.6.34 ATM):
Signed-off-by: Krzysztof Halasa <khc at pm.waw.pl>

--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -545,7 +545,7 @@ void intel_crt_init(struct drm_device *dev)
 				   (1 << INTEL_ANALOG_CLONE_BIT) |
 				   (1 << INTEL_SDVO_LVDS_CLONE_BIT);
 	intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
-	connector->interlace_allowed = 0;
+	connector->interlace_allowed = 1;
 	connector->doublescan_allowed = 0;
 
 	drm_encoder_helper_add(&intel_encoder->enc, &intel_crt_helper_funcs);
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2122,6 +2123,8 @@ static bool intel_crtc_mode_fixup(struct drm_crtc *crtc,
 		if (mode->clock * 3 > 27000 * 4)
 			return MODE_CLOCK_HIGH;
 	}
+
+	drm_mode_set_crtcinfo(adjusted_mode, 0);
 	return true;
 }
 
@@ -3377,6 +3380,18 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
 		}
 	}
 
+	if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
+		pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
+		/* the chip adds 2 halflines automatically */
+		adjusted_mode->crtc_vdisplay -= 1;
+		adjusted_mode->crtc_vtotal -= 1;
+		adjusted_mode->crtc_vblank_start -= 1;
+		adjusted_mode->crtc_vblank_end -= 1;
+		adjusted_mode->crtc_vsync_end -= 1;
+		adjusted_mode->crtc_vsync_start -= 1;
+	} else
+		pipeconf &= ~PIPECONF_INTERLACE_W_FIELD_INDICATION; /* progressive */
+
 	I915_WRITE(htot_reg, (adjusted_mode->crtc_hdisplay - 1) |
 		   ((adjusted_mode->crtc_htotal - 1) << 16));
 	I915_WRITE(hblank_reg, (adjusted_mode->crtc_hblank_start - 1) |

Simple, isn't it?

The driver, against 2.11.0 (Fedora-13 SRPM to be exact). I'm not sure if
the way to check for interlaced mode is the best one:

--- a/src/drmmode_display.c	2010-05-25 13:15:23.629362630 +0200
+++ b/src/drmmode_display.c	2010-05-18 16:23:16.097228921 +0200
@@ -1272,6 +1272,7 @@
 
 	output->possible_crtcs = kencoder->possible_crtcs;
 	output->possible_clones = kencoder->possible_clones;
+	output->interlaceAllowed = TRUE;
 	return;
 }
 
--- a/src/i830_dri.c	2010-05-25 13:15:23.629362630 +0200
+++ b/src/i830_dri.c	2010-05-25 18:04:39.565361948 +0200
@@ -348,6 +348,12 @@
 				    event = MI_WAIT_FOR_PIPEB_SVBLANK;
 			}
 
+			if (scrn->currentMode->Flags & V_INTERLACE) {
+				/* DSL counts field lines */
+				y1 /= 2;
+				y2 /= 2;
+			}
+
 			BEGIN_BATCH(5);
 			/*
 			 * The documentation says that the LOAD_SCAN_LINES
--- a/src/i830_video.c	2010-03-18 18:13:36.000000000 +0100
+++ b/src/i830_video.c	2010-05-25 18:05:05.892486453 +0200
@@ -1308,6 +1308,12 @@
 			pixman_f_transform_bounds(&crtc->f_framebuffer_to_crtc,
 						  &box_in_crtc_coordinates);
 
+		if (scrn->currentMode->Flags & V_INTERLACE) {
+			/* DSL counts field lines */
+			box_in_crtc_coordinates.y1 /= 2;
+			box_in_crtc_coordinates.y2 /= 2;
+		}
+
 		BEGIN_BATCH(5);
 		/* The documentation says that the LOAD_SCAN_LINES command
 		 * always comes in pairs. Don't ask me why. */

-- 
Krzysztof Halasa