Dual Head DVI on Q965/Q963 Express Chipset Family

[garrone]

Regarding the devices, I do not have the exact pci device id
at the moment. The intel ICH9 family
contains pci register id's for this board. I will email you with this
information in a few days. The detection is easily addressed from the
configuration. I will check out and verify any code changes as they
occur.

In my limited experience, if one SDVO output is used, with say a VGA/SDVO
combination, the SDVOB is used, and if two are used, then SDVOB/C are
used. The bios appears to enforce this. I have only seen 1 real example
though. I've never used other outputs. The LVDS configuration in the
config file was a hangover from another setup. It merely specified an
unused monitor.

I don't believe probing for connected terminals with the GMBUS/i2c on
the SDVO outputs is a big deal. Some bare metal programming allows the 
fact of monitor connection to be determined within a few hundred
microseconds. The VGA output connection state can be determined by reading a
bit in a register. Let me know if you want more details, as it is some
time since I have attended this subject.

On a related note, I noticed that if one attempts to enable
page-flipping, the xorg intel driver ultimately disables it with the comment
that the version of drm is insufficient, less than 1.9. However in the
code the check is for the minor version number only, and the current drm
version, 2.4 or thereabouts, fails this check (src/i830_dri.c, at the
end of the function I830DRIScreenInit). I have to say that
enabling or disabling page-flipping and triple buffering options make no
difference to my display. It acts as if they are enabled anyway,
which is probably a good thing, except that interrupts are being lost somewhere.
The count returned by the DRM ioctl is perfect with respect to
glXSwapBuffer, however it doesn't tally with the count in
/proc/interrupts.  I expect to be looking at this in some detail shortly.

Also if a multiheaded display has two identical monitors on the SDVO
outputs, then the phase of the displays with respect to each other
can greatly affect the output quality and the consistency of the result.
If Xorg comes up, currently the phase is fairly random, and one item can
look perfect, and another rather imperfect.

On Thu, Nov 20, 2008 at 11:01:00AM +0800, Zhenyu Wang wrote:
> On 2008.11.19 03:36:36 +0800, garrone wrote:
> > 
> > I have managed this with the latest everything.
> > Initially I had two blank screens.
> > In xorg.conf, intel device section,
> > I had to set the ForceSDVODetect option to see TMDS-2
> > I had to comment out Monitor-LVDS option, even though it was a null
> > monitor, to see TMDS-1.
> > I had Monitor-TMDS-1 and Monitor-TMDS-2 set.
> > I did find, (and commented in another posting), that the intel driver
> > incorrectly uses a reserved bit to determine if the TMDS-2 monitor was
> > initially connected.
> 
> Thanks for catching this! Looks doc has right reserve bit note here.
> So we have to probe SDVOC anyway on 965G and 965GM chipset, which means
> more time in startup. Maybe we can only detect SDVOC if SDVOB is detected,
> as single SDVO output should go SDVOB, but I'm not sure about this now,
> will check with spec. Patch below should fix the detection for now.
> 
> So your machine doesn't have LVDS, right? Could you provide more info?
> like 'lspci -nv', so we can quirk it in the driver.
> 
>