DRI2 direct rendering

[Hanno Böck]

Am Dienstag 01 April 2008 schrieb Kristian Høgsberg:
> Right now it's only working on intel hardware, but much of the work is
> chipset agnostic infrastructure.  The missing piece is the memory
> manager for radeon card.  Once that's done, much of this should fall
> in place for the radeon family of cards too.

Now sorry for the questions, but this memory-manager-thing confuses me (Am I 
right that memorymanager==ttm?). I heared so much of it, though it seems to 
be the "we can do everything with it and we'll have it sometime in the 
future"-thing all over.
I was pretty sure I read some blog-entry about someone implementing ttm/radeon 
and I found it:
http://airlied.livejournal.com/45566.html
Though I wouldn't say I fully understand that blog-entry, doesn't it say it 
has (at least preliminary) ttm-support for radeon? Thus it should work?

What am I missing? Yeah, I barely understand the many internals, but I'm an 
interested reader of all xorg-graphics-progress.

-- 
Hanno Böck		Blog:		http://www.hboeck.de/
GPG: 3DBD3B20		Jabber/Mail:	hanno at hboeck.de
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