If your monitor doesn't sync with xf86-video-intel

Eric Anholt eric at anholt.net
Thu Oct 18 12:27:04 PDT 2007


We've been looking into an issue with our PLL programming, where
following the spec as we understand it results in us not being able to
choose a reasonable dotclock for a number of popular video modes
(115-140Mhz dotclocks for VGA/TMDS outputs).  I've pushed a check into
the driver to warn in the log if our chosen dotclock is wildly out of
range.

If you've been having issues, please update to master and check if
you're getting something like "(WW) Chosen PLL clock of 140.1Mhz more
than 2% away from desired 135.0Mhz)".  If so, you might try reducing
I9XX_P2_SDVO_DAC_SLOW_LIMIT to 115000 and seeing what happens.  This is
out of the spec as we understand it, so the usual disclaimer at the top
of our source applies even more strongly, but it might get you working
modes.

We're working on getting clarification of this spec so that we can
confidently fix the issue in the driver.

-- 
Eric Anholt                             anholt at FreeBSD.org
eric at anholt.net                         eric.anholt at intel.com

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