Intel 915G with Dell 2005FPW TFT no bigger resolution then 1280x1024

[Alan Hourihane]

On Thu, 2005-10-20 at 19:32 -0400, Mike A. Harris wrote:
> Xavier Bestel wrote:
> > Le jeudi 20 octobre 2005 à 12:52 -0600, Philip Prindeville a écrit :
> > 
> >>The EDID reported by this monitor is slightly broken, and I've been
> >>trying to get Dell to fix it, but they have no clue as to what I'm talking
> >>about, and their "award winning service" (in India) has no way of
> >>talking to anyone on the factory floor or in the design bureau in
> >>Texas or wherever that might be.
> > 
> > 
> > FWIW I have plugged it on a pc loaded with Mandriva 2006, and without
> > even touching xorg.conf or anything the desktop booted in 1680x1050. 
> > 100% perfect, I'd like Xorg to be always like that :)
> 
> The i810 driver changed since 6.8.2, and now defaults to using DDC.
> 
> This is not an OS specific change, but an Xorg official driver change.
> Any distribution that ships the newest i810 driver as-is, will
> experience this problem.
> 
> Alan Hourihane has mentioned before that this is a bug in the
> display itself, lying about it's EDID data.  The "best" fix
> of course would be for Dell to fix their monitors to report
> the correct EDID data, and magically blast it into the monitor
> firmware without the user knowing about the problem or needing
> to do anything manually.
> 
> Unfortunately, it's very unlikely for that to happen.  Judging
> by the number of bug reports I've seen from people with i810
> hardware, this problem is going to affect a large number of users.
> 
> I'm wondering if it might be a better idea to revert the changes
> back to the previous behaviour that worked for everyone, even
> though DDC wouldn't be used by default?
> 
> IMHO, DDC is just not reliable enough in general to count on.

I think there could be a workaround available for this and to be able to
leave DDC on for the time being at least.

The 1680x1050 mode which is supported by the monitor is listed in it's
additional video modes with the pixelclock of 162MHz, which is of course
outside of it's DDC specified 160MHz. 

Now, I think we should add some code to pull these monitor specific
modes out and add them to the monitor modes, and if they are found to
have pixelclocks higher than DDC is specifying, we just increase the DDC
limits to cater for that clock too.

That should fix this problem, rather than turning DDC off.

Alan.