interlaced video question for you XV experts

Thomas Winischhofer thomas at winischhofer.net
Fri Mar 18 03:16:26 PST 2005


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Jon Smirl wrote:
| On Fri, 18 Mar 2005 11:40:53 +1100, Benjamin Herrenschmidt
| <benh at kernel.crashing.org> wrote:
|
|>Doing that properly usually requires to have at least the 2 next fields
|>in advance in memory and the driver trigger the switch on the vblank irq
|>to get perfectly sync'd, with the ability for the driver to "drop" a
|>frame if it notices that it missed a field in order to never cause a
|>field inversion. So the driver must know which field is contained in
|>which buffer and which field will be displayed at next interrupt.
|
|
| So now I'm trying to figure out how you would tell a radeon chip to do
| this. I see how to do this with a 640x525 buffer and set the output to
| 60Hz interlaced. It's not obvious to me how to set the chip up to do
| 640x262, is there where the DOUBLE_SCAN bit comes into play?
|
| Would I use a 640x262 buffer, set output to 60Hz interlaced with
| DOUBLE_SCAN, and then swap the buffers on each vsync interrupt?
| DOUBLE_SCAN causes each line to be read twice but since I swapped the
| buffers it outputs two different halves of the frame.
|
| Is there really any point in making interlaced output like this work?


On progressive scan output devices, interlace output - even with such
hacks - looks awful. I tried it, it's ugly.

On interlace devices, it could make sense... but do TV-capable cards
really output interlace to the TV-converter? I can only speak for SiS
cards and they do not. The video bridge (=TV converter) takes care of
converting non-interlaced output to interlace, and there is no way to
control or find out which field is being shown at a certain time. So
synchonizing is impossible.

Thomas


- --
Thomas Winischhofer
Vienna/Austria
thomas AT winischhofer DOT net	       *** http://www.winischhofer.net
twini AT xfree86 DOT org
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