[PATCH xf86-video-amdgpu 3/6] Add amdgpu_pixmap_get_tiling_info
StDenis, Tom
Tom.StDenis at amd.com
Wed Jun 8 13:57:24 UTC 2016
grep for TSTD below...
________________________________
From: xorg-driver-ati <xorg-driver-ati-bounces at lists.x.org> on behalf of Michel Dänzer <michel at daenzer.net>
Sent: Wednesday, June 8, 2016 04:45
To: xorg-driver-ati at lists.x.org
Cc: Yu, Qiang
Subject: [PATCH xf86-video-amdgpu 3/6] Add amdgpu_pixmap_get_tiling_info
From: Michel Dänzer <michel.daenzer at amd.com>
Retrieves the tiling information about a pixmap BO from the kernel
driver.
Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
---
src/amdgpu_bo_helper.c | 33 ++++++++++++++++++++++++++++++++-
src/amdgpu_bo_helper.h | 2 ++
src/amdgpu_pixmap.h | 2 ++
3 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/src/amdgpu_bo_helper.c b/src/amdgpu_bo_helper.c
index a566920..783347b 100644
--- a/src/amdgpu_bo_helper.c
+++ b/src/amdgpu_bo_helper.c
@@ -131,6 +131,35 @@ Bool amdgpu_bo_get_handle(struct amdgpu_buffer *bo, uint32_t *handle)
handle) == 0;
}
+static void amdgpu_pixmap_do_get_tiling_info(PixmapPtr pixmap)
+{
+ struct amdgpu_pixmap *priv = amdgpu_get_pixmap_private(pixmap);
+ ScreenPtr screen = pixmap->drawable.pScreen;
+ ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
+ AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
+ struct drm_amdgpu_gem_metadata gem_metadata;
+
+ gem_metadata.handle = priv->handle;
+ gem_metadata.op = AMDGPU_GEM_METADATA_OP_GET_METADATA;
+
+ if (drmCommandWriteRead(pAMDGPUEnt->fd, DRM_AMDGPU_GEM_METADATA,
+ &gem_metadata, sizeof(gem_metadata)) == 0)
+ priv->tiling_info = gem_metadata.data.tiling_info;
+}
+
+uint64_t amdgpu_pixmap_get_tiling_info(PixmapPtr pixmap)
+{
+ struct amdgpu_pixmap *priv = amdgpu_get_pixmap_private(pixmap);
+ uint32_t handle;
+
+ if (!priv || !priv->handle_valid) {
+ amdgpu_pixmap_get_handle(pixmap, &handle);
+ priv = amdgpu_get_pixmap_private(pixmap);
TSTD: If this fails won't you just end up with a NULL pointer?
+ }
+
+ return priv->tiling_info;
+}
+
Bool amdgpu_pixmap_get_handle(PixmapPtr pixmap, uint32_t *handle)
{
#ifdef USE_GLAMOR
@@ -162,13 +191,15 @@ Bool amdgpu_pixmap_get_handle(PixmapPtr pixmap, uint32_t *handle)
r = drmPrimeFDToHandle(pAMDGPUEnt->fd, fd, &priv->handle);
close(fd);
if (r == 0)
- goto success;
+ goto get_tiling_info;
}
#endif
if (!priv->bo || !amdgpu_bo_get_handle(priv->bo, &priv->handle))
return FALSE;
+ get_tiling_info:
+ amdgpu_pixmap_do_get_tiling_info(pixmap);
success:
priv->handle_valid = TRUE;
*handle = priv->handle;
diff --git a/src/amdgpu_bo_helper.h b/src/amdgpu_bo_helper.h
index 3e81fca..efbdcda 100644
--- a/src/amdgpu_bo_helper.h
+++ b/src/amdgpu_bo_helper.h
@@ -31,6 +31,8 @@ extern struct amdgpu_buffer *amdgpu_alloc_pixmap_bo(ScrnInfoPtr pScrn, int width
extern Bool amdgpu_bo_get_handle(struct amdgpu_buffer *bo, uint32_t *handle);
+extern uint64_t amdgpu_pixmap_get_tiling_info(PixmapPtr pixmap);
+
extern Bool amdgpu_pixmap_get_handle(PixmapPtr pixmap, uint32_t *handle);
extern int amdgpu_bo_map(ScrnInfoPtr pScrn, struct amdgpu_buffer *bo);
diff --git a/src/amdgpu_pixmap.h b/src/amdgpu_pixmap.h
index 1fba90e..ecdd74d 100644
--- a/src/amdgpu_pixmap.h
+++ b/src/amdgpu_pixmap.h
@@ -32,6 +32,8 @@ struct amdgpu_pixmap {
uint_fast32_t gpu_read;
uint_fast32_t gpu_write;
+ uint64_t tiling_info;
+
struct amdgpu_buffer *bo;
/* GEM handle for pixmaps shared via DRI2/3 */
--
2.8.1
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