[PATCH] Don't set TILE_SPLIT flags if surface.tile_split == 0.

[Mario Kleiner]

On pre-Evergreen hw, libdrm's r6_surface_best() helper
for the surface managers radeon_surface_best() routine
is a no-op and therefore doesn't assign any tile_split
settings to created surfaces, so it leaves
surface.tile_split on its "undefined" value of 0.

Mesa's DRI3/Present backend creates DRI3 Pixmaps via
the DRIImage extension and the radeon gallium driver
implementation of that extension uses the libdrm
surface manager for backing bo creation and treats
an undefined surface.tile_split==0, as returned by
the surface manager for pre-evergreen, as a signal
to not assign any tile_split flags to the DRI3 Pixmaps
bo.

The ddx also uses libdrm surface manager to create the
x-screen pixmap, but so far treated the returned undefined
surface.tile_split==0 by mapping it to eg_tile_split()'s
default tile_split flags, which are different from Mesa's
tiling flags for DRI3 pixmaps. Under DRI3/Present this
causes a mismatch of src pixmap and destination root
pixmaps tiling flags and thereby prevents page flipping
for pixmap presents.

Change the ddx code to treat surface.tile_split==0 the
same way as the radeon gallium driver to avoid mismatched
tiling flags and thereby allow DRI3/Present page-flip to
work on pre-Evergreen hw.

Tested on RV730 and Evergreen "Juniper".

Signed-off-by: Mario Kleiner <mario.kleiner.de at gmail.com>
---
 src/drmmode_display.c  | 4 +++-
 src/radeon_bo_helper.c | 3 ++-
 src/radeon_kms.c       | 4 +++-
 3 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 3564853..205ef6a 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -1842,7 +1842,9 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
 			tiling_flags |= surface.bankw << RADEON_TILING_EG_BANKW_SHIFT;
 			tiling_flags |= surface.bankh << RADEON_TILING_EG_BANKH_SHIFT;
 			tiling_flags |= surface.mtilea << RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT;
-			tiling_flags |= eg_tile_split(surface.tile_split) << RADEON_TILING_EG_TILE_SPLIT_SHIFT;
+			if (surface.tile_split)
+				tiling_flags |= eg_tile_split(surface.tile_split)
+						<< RADEON_TILING_EG_TILE_SPLIT_SHIFT;
 			break;
 		case RADEON_SURF_MODE_1D:
 			tiling_flags |= RADEON_TILING_MICRO;
diff --git a/src/radeon_bo_helper.c b/src/radeon_bo_helper.c
index ebbb192..ce964e0 100644
--- a/src/radeon_bo_helper.c
+++ b/src/radeon_bo_helper.c
@@ -168,7 +168,8 @@ radeon_alloc_pixmap_bo(ScrnInfoPtr pScrn, int width, int height, int depth,
 				tiling |= surface.bankw << RADEON_TILING_EG_BANKW_SHIFT;
 				tiling |= surface.bankh << RADEON_TILING_EG_BANKH_SHIFT;
 				tiling |= surface.mtilea << RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT;
-				tiling |= eg_tile_split(surface.tile_split) << RADEON_TILING_EG_TILE_SPLIT_SHIFT;
+				if (surface.tile_split)
+					tiling |= eg_tile_split(surface.tile_split) << RADEON_TILING_EG_TILE_SPLIT_SHIFT;
 				tiling |= eg_tile_split(surface.stencil_tile_split) << RADEON_TILING_EG_STENCIL_TILE_SPLIT_SHIFT;
 				break;
 			case RADEON_SURF_MODE_1D:
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index 25a746d..12658ca 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -1915,7 +1915,9 @@ static Bool radeon_setup_kernel_mem(ScreenPtr pScreen)
 			tiling_flags |= surface.bankw << RADEON_TILING_EG_BANKW_SHIFT;
 			tiling_flags |= surface.bankh << RADEON_TILING_EG_BANKH_SHIFT;
 			tiling_flags |= surface.mtilea << RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT;
-			tiling_flags |= eg_tile_split(surface.tile_split) << RADEON_TILING_EG_TILE_SPLIT_SHIFT;
+			if (surface.tile_split)
+				tiling_flags |= eg_tile_split(surface.tile_split)
+						<< RADEON_TILING_EG_TILE_SPLIT_SHIFT;
 			break;
 		case RADEON_SURF_MODE_1D:
 			tiling_flags |= RADEON_TILING_MICRO;
-- 
1.9.1