[Bug 43191] Radeons needs 2D (MACRO) color tiling for optimal performance

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=43191

--- Comment #13 from Simon Farnsworth <simon.farnsworth at onelan.co.uk> 2011-11-28 06:44:35 PST ---
Looks like the pageflip hang is a red herring; I changed the existing DRM_DEBUG
in evergreen_page_flip to DRM_ERROR, and added a new one just before the loop
to tell me what crtc_base should be once the flip has completed. I get:


[   79.049935] [drm:evergreen_page_flip] *ERROR* Updating to 0x24d0000
[   79.052905] [drm:evergreen_page_flip] *ERROR* Update pending now high.
Unlocking vupdate_lock.
[   99.889075] radeon 0000:00:01.0: GPU lockup CP stall for more than 10000msec
[   99.896241] GPU lockup (waiting for 0x0000000F last fence id 0x00000007)
[   99.904379] radeon 0000:00:01.0: GPU softreset
[   99.908977] radeon 0000:00:01.0:   GRBM_STATUS=0xF5702828
[   99.914447] radeon 0000:00:01.0:   GRBM_STATUS_SE0=0xFC000005
[   99.920264] radeon 0000:00:01.0:   GRBM_STATUS_SE1=0x00000007
[   99.926083] radeon 0000:00:01.0:   SRBM_STATUS=0x20000040
[   99.931558] radeon 0000:00:01.0:   GRBM_SOFT_RESET=0x00007F6B
[   99.937479] radeon 0000:00:01.0:   GRBM_STATUS=0x00003828
[   99.942953] radeon 0000:00:01.0:   GRBM_STATUS_SE0=0x00000007
[   99.948771] radeon 0000:00:01.0:   GRBM_STATUS_SE1=0x00000007
[   99.954593] radeon 0000:00:01.0:   SRBM_STATUS=0x20000040
[   99.961065] radeon 0000:00:01.0: GPU reset succeed
[   99.984272] [drm] PCIE GART of 512M enabled (table at 0x0000000000040000).
[   99.991375] radeon 0000:00:01.0: WB enabled
[   99.995897] [drm:evergreen_page_flip] *ERROR* Updating to 0x1b6a000
[  100.012243] [drm] ring test succeeded in 0 usecs
[  100.016950] [drm] ib test succeeded in 1 usecs

It looks probable that the page flip is half-before and half-after the GPU
reset, causing the lockup.

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