[PATCH 2/2] Use RADEON_ALIGN instead of open coding it.

Matt Turner mattst88 at gmail.com
Wed Feb 24 19:46:28 PST 2010


Also fix some RADEON_ALIGN(x, 63), which would return incorrect results
for odd x. Though this shouldn't happen, it's still not right. You
wouldn't ever write (x + 62) & ~62 which is clearly wrong (and what it
expands to).

CC: Jerome Glisse <jglisse at redhat.com>
CC: Alex Deucher <alexdeucher at gmail.com>
CC: Dave Airlie <airlied at redhat.com>
Signed-off-by: Matt Turner <mattst88 at gmail.com>
---
 src/drmmode_display.c            |    6 ++--
 src/r600_exa.c                   |    8 ++--
 src/r600_textured_videofuncs.c   |    4 +-
 src/r6xx_accel.c                 |    2 +-
 src/radeon_accel.c               |   16 +++++-----
 src/radeon_accelfuncs.c          |    4 +-
 src/radeon_driver.c              |    4 +-
 src/radeon_exa.c                 |   10 +++---
 src/radeon_exa_funcs.c           |    6 ++--
 src/radeon_exa_render.c          |    2 +-
 src/radeon_modes.c               |   10 +++---
 src/radeon_render.c              |    8 ++--
 src/radeon_textured_video.c      |   30 +++++++++---------
 src/radeon_textured_videofuncs.c |    8 ++--
 src/radeon_video.c               |   60 +++++++++++++++++++-------------------
 15 files changed, 89 insertions(+), 89 deletions(-)

diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index bb219cf..e69b654 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -425,7 +425,7 @@ drmmode_crtc_shadow_allocate(xf86CrtcPtr crtc, int width, int height)
 	int ret;
 	unsigned long rotate_pitch;
 
-	width = RADEON_ALIGN(width, 63);
+	width = RADEON_ALIGN(width, 64);
 	rotate_pitch = width * drmmode->cpp;
 
 	size = rotate_pitch * height;
@@ -460,7 +460,7 @@ drmmode_crtc_shadow_create(xf86CrtcPtr crtc, void *data, int width, int height)
 	if (!data)
 		data = drmmode_crtc_shadow_allocate (crtc, width, height);
 
-	rotate_pitch = RADEON_ALIGN(width, 63) * drmmode->cpp;
+	rotate_pitch = RADEON_ALIGN(width, 64) * drmmode->cpp;
 
 	rotate_pixmap = drmmode_create_bo_pixmap(pScrn->pScreen,
 						 width, height,
@@ -1041,7 +1041,7 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
 	if (front_bo)
 		radeon_bo_wait(front_bo);
 
-	pitch = RADEON_ALIGN(width, 63);
+	pitch = RADEON_ALIGN(width, 64);
 	height = RADEON_ALIGN(height, 16);
 
 	screen_size = pitch * height * cpp;
diff --git a/src/r600_exa.c b/src/r600_exa.c
index 5ed9c07..6fed720 100644
--- a/src/r600_exa.c
+++ b/src/r600_exa.c
@@ -1916,7 +1916,7 @@ R600CopyToVRAM(ScrnInfoPtr pScrn,
     RADEONInfoPtr info = RADEONPTR(pScrn);
     uint32_t scratch_mc_addr;
     int wpass = w * (bpp/8);
-    int scratch_pitch_bytes = (wpass + 255) & ~255;
+    int scratch_pitch_bytes = RADEON_ALIGN(wpass, 256);
     uint32_t scratch_pitch = scratch_pitch_bytes / (bpp / 8);
     int scratch_offset = 0, hpass, temph;
     char *dst;
@@ -2008,7 +2008,7 @@ R600DownloadFromScreen(PixmapPtr pSrc, int x, int y, int w, int h,
     uint32_t src_height = pSrc->drawable.height;
     int bpp = pSrc->drawable.bitsPerPixel;
     uint32_t scratch_mc_addr;
-    int scratch_pitch_bytes = (dst_pitch + 255) & ~255;
+    int scratch_pitch_bytes = RADEON_ALIGN(dst_pitch, 256);
     int scratch_offset = 0, hpass;
     uint32_t scratch_pitch = scratch_pitch_bytes / (bpp / 8);
     int wpass = w * (bpp/8);
@@ -2089,7 +2089,7 @@ R600UploadToScreenCS(PixmapPtr pDst, int x, int y, int w, int h,
     unsigned size;
     uint32_t dst_domain;
     int bpp = pDst->drawable.bitsPerPixel;
-    uint32_t scratch_pitch = (w * bpp / 8 + 255) & ~255;
+    uint32_t scratch_pitch = RADEON_ALIGN(w * bpp / 8, 256);
     uint32_t src_pitch_hw = scratch_pitch / (bpp / 8);
     uint32_t dst_pitch_hw = exaGetPixmapPitch(pDst) / (bpp / 8);
     Bool r;
@@ -2163,7 +2163,7 @@ R600DownloadFromScreenCS(PixmapPtr pSrc, int x, int y, int w,
     unsigned size;
     uint32_t src_domain = 0;
     int bpp = pSrc->drawable.bitsPerPixel;
-    uint32_t scratch_pitch = (w * bpp / 8 + 255) & ~255;
+    uint32_t scratch_pitch = RADEON_ALIGN(w * bpp / 8, 256);
     uint32_t dst_pitch_hw = scratch_pitch / (bpp / 8);
     uint32_t src_pitch_hw = exaGetPixmapPitch(pSrc) / (bpp / 8);
     Bool r;
diff --git a/src/r600_textured_videofuncs.c b/src/r600_textured_videofuncs.c
index f979480..f9b3a90 100644
--- a/src/r600_textured_videofuncs.c
+++ b/src/r600_textured_videofuncs.c
@@ -337,7 +337,7 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
 	tex_res.format              = FMT_8;
 	tex_res.w                   = pPriv->w >> 1;
 	tex_res.h                   = pPriv->h >> 1;
-	tex_res.pitch               = ((accel_state->src_pitch[0] >> 1) + 255) & ~255;
+	tex_res.pitch               = RADEON_ALIGN(accel_state->src_pitch[0] >> 1, 256);
 	tex_res.dst_sel_x           = SQ_SEL_X; /* V or U */
 	tex_res.dst_sel_y           = SQ_SEL_1;
 	tex_res.dst_sel_z           = SQ_SEL_1;
@@ -362,7 +362,7 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
 	tex_res.format              = FMT_8;
 	tex_res.w                   = pPriv->w >> 1;
 	tex_res.h                   = pPriv->h >> 1;
-	tex_res.pitch               = ((accel_state->src_pitch[0] >> 1) + 255) & ~255;
+	tex_res.pitch               = RADEON_ALIGN(accel_state->src_pitch[0] >> 1, 256);
 	tex_res.dst_sel_x           = SQ_SEL_X; /* V or U */
 	tex_res.dst_sel_y           = SQ_SEL_1;
 	tex_res.dst_sel_z           = SQ_SEL_1;
diff --git a/src/r6xx_accel.c b/src/r6xx_accel.c
index a069530..3ec9018 100644
--- a/src/r6xx_accel.c
+++ b/src/r6xx_accel.c
@@ -254,7 +254,7 @@ set_render_target(ScrnInfoPtr pScrn, drmBufPtr ib, cb_config_t *cb_conf)
 	cb_color_info |= SOURCE_FORMAT_bit;
 
     pitch = (cb_conf->w / 8) - 1;
-    h = (cb_conf->h + 7) & ~7;
+    h = RADEON_ALIGN(cb_conf->h, 8);
     slice = ((cb_conf->w * h) / 64) - 1;
 
     BEGIN_BATCH(3 + 2);
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
index 9bf8f3c..0250d91 100644
--- a/src/radeon_accel.c
+++ b/src/radeon_accel.c
@@ -768,7 +768,7 @@ void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard)
 	info->cp->indirectStart  = 0;
     } else {
 	/* Start on a double word boundary */
-	info->cp->indirectStart  = buffer->used = (buffer->used + 7) & ~7;
+	info->cp->indirectStart  = buffer->used = RADEON_ALIGN(buffer->used, 8);
 	if (RADEON_VERBOSE) {
 	    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "   Starting at %d\n",
 		       info->cp->indirectStart);
@@ -867,11 +867,11 @@ RADEONHostDataBlit(
 	break;
     case 2:
 	format = RADEON_GMC_DST_16BPP;
-	*bufPitch = 2 * ((w + 1) & ~1);
+	*bufPitch = 2 * RADEON_ALIGN(w, 2);
 	break;
     case 1:
 	format = RADEON_GMC_DST_8BPP_CI;
-	*bufPitch = (w + 3) & ~3;
+	*bufPitch = RADEON_ALIGN(w, 4);
 	break;
     default:
 	xf86DrvMsg( pScrn->scrnIndex, X_ERROR,
@@ -1157,7 +1157,7 @@ RADEONSetupMemXAA_DRI(int scrnIndex, ScreenPtr pScreen)
      * Might need that for non-XF86DRI too?
      */
     if (info->allowColorTiling) {
-	bufferSize = RADEON_ALIGN(((pScrn->virtualY + 15) & ~15) * width_bytes,
+	bufferSize = RADEON_ALIGN((RADEON_ALIGN(pScrn->virtualY, 16)) * width_bytes,
 		      RADEON_GPU_PAGE_SIZE);
     } else {
         bufferSize = RADEON_ALIGN(pScrn->virtualY * width_bytes,
@@ -1168,8 +1168,8 @@ RADEONSetupMemXAA_DRI(int scrnIndex, ScreenPtr pScreen)
      * which is always the case if color tiling is used due to color pitch
      * but not necessarily otherwise, and its height a multiple of 16 lines.
      */
-    info->dri->depthPitch = (pScrn->displayWidth + 31) & ~31;
-    depthSize = RADEON_ALIGN(((pScrn->virtualY + 15) & ~15) * info->dri->depthPitch
+    info->dri->depthPitch = RADEON_ALIGN(pScrn->displayWidth, 32);
+    depthSize = RADEON_ALIGN((RADEON_ALIGN(pScrn->virtualY, 16)) * info->dri->depthPitch
 		  * depthCpp, RADEON_GPU_PAGE_SIZE);
 
     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -1324,7 +1324,7 @@ RADEONSetupMemXAA_DRI(int scrnIndex, ScreenPtr pScreen)
 	if ((fbarea = xf86AllocateOffscreenArea(pScreen,
 						pScrn->displayWidth,
 						info->allowColorTiling ? 
-						((pScrn->virtualY + 15) & ~15)
+						(RADEON_ALIGN(pScrn->virtualY, 16))
 						- pScrn->virtualY + 2 : 2,
 						0, NULL, NULL,
 						NULL))) {
@@ -1432,7 +1432,7 @@ RADEONSetupMemXAA(int scrnIndex, ScreenPtr pScreen)
 	if ((fbarea = xf86AllocateOffscreenArea(pScreen,
 						pScrn->displayWidth,
 						info->allowColorTiling ? 
-						((pScrn->virtualY + 15) & ~15)
+						(RADEON_ALIGN(pScrn->virtualY, 16))
 						- pScrn->virtualY + 2 : 2,
 						0, NULL, NULL,
 						NULL))) {
diff --git a/src/radeon_accelfuncs.c b/src/radeon_accelfuncs.c
index 2d6fe01..dd1defd 100644
--- a/src/radeon_accelfuncs.c
+++ b/src/radeon_accelfuncs.c
@@ -827,7 +827,7 @@ FUNC_NAME(RADEONSubsequentScanlineCPUToScreenColorExpandFill)(ScrnInfoPtr
     OUT_ACCEL_REG(RADEON_SC_BOTTOM_RIGHT,  ((y+h) << 16) | ((x+w) & 0xffff));
     OUT_ACCEL_REG(RADEON_DST_Y_X,          (y << 16)     | (x & 0xffff));
     /* Have to pad the width here and use clipping engine */
-    OUT_ACCEL_REG(RADEON_DST_HEIGHT_WIDTH, (h << 16)     | ((w + 31) & ~31));
+    OUT_ACCEL_REG(RADEON_DST_HEIGHT_WIDTH, (h << 16)     | RADEON_ALIGN(w, 32));
 
     FINISH_ACCEL();
 
@@ -836,7 +836,7 @@ FUNC_NAME(RADEONSubsequentScanlineCPUToScreenColorExpandFill)(ScrnInfoPtr
     info->accel_state->scanline_x      = x;
     info->accel_state->scanline_y      = y;
     /* Have to pad the width here and use clipping engine */
-    info->accel_state->scanline_w      = (w + 31) & ~31;
+    info->accel_state->scanline_w      = RADEON_ALIGN(w, 32);
     info->accel_state->scanline_h      = h;
 
     info->accel_state->scanline_x1clip = x + skipleft;
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index b65e3f8..8d1ef6e 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -4286,7 +4286,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn)
     int cpp = info->CurrentLayout.pixel_bytes;
     /* depth/front/back pitch must be identical (and the same as displayWidth) */
     int width_bytes = pScrn->displayWidth * cpp;
-    int bufferSize = RADEON_ALIGN(((pScrn->virtualY + 15) & ~15) * width_bytes,
+    int bufferSize = RADEON_ALIGN((RADEON_ALIGN(pScrn->virtualY, 16)) * width_bytes,
         RADEON_GPU_PAGE_SIZE);
     unsigned int color_pattern, swap_pattern;
 
@@ -4319,7 +4319,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn)
 	int retvalue;
 	int depthCpp = (info->dri->depthBits - 8) / 4;
 	int depth_width_bytes = pScrn->displayWidth * depthCpp;
-	int depthBufferSize = RADEON_ALIGN(((pScrn->virtualY + 15) & ~15) * depth_width_bytes,
+	int depthBufferSize = RADEON_ALIGN((RADEON_ALIGN(pScrn->virtualY, 16)) * depth_width_bytes,
 				RADEON_GPU_PAGE_SIZE);
 	unsigned int depth_pattern;
 
diff --git a/src/radeon_exa.c b/src/radeon_exa.c
index 63ded94..217a0fe 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -401,7 +401,7 @@ void *RADEONEXACreatePixmap2(ScreenPtr pScreen, int width, int height,
     int padded_width;
     uint32_t size;
     uint32_t tiling = 0;
-    int pixmap_align = 0;
+    int pixmap_align;
 
 #ifdef EXA_MIXED_PIXMAPS
     if (info->accel_state->exa->flags & EXA_MIXED_PIXMAPS) {
@@ -421,13 +421,13 @@ void *RADEONEXACreatePixmap2(ScreenPtr pScreen, int width, int height,
     }
 
     if (tiling) {
-	height = (height + 15) & ~15;
-	pixmap_align = 255;
+	height = RADEON_ALIGN(height, 16);
+	pixmap_align = 256;
     } else
-	pixmap_align = 63;
+	pixmap_align = 64;
 
     padded_width = ((width * bitsPerPixel + FB_MASK) >> FB_SHIFT) * sizeof(FbBits);
-    padded_width = (padded_width + pixmap_align) & ~pixmap_align;
+    padded_width = RADEON_ALIGN(padded_width, pixmap_align);
     size = height * padded_width;
 
     new_priv = xcalloc(1, sizeof(struct radeon_exa_pixmap_priv));
diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c
index 91a1c75..cdc0edb 100644
--- a/src/radeon_exa_funcs.c
+++ b/src/radeon_exa_funcs.c
@@ -466,7 +466,7 @@ RADEONUploadToScreenCS(PixmapPtr pDst, int x, int y, int w, int h,
     uint32_t dst_domain;
     uint32_t dst_pitch_offset;
     unsigned bpp = pDst->drawable.bitsPerPixel;
-    uint32_t scratch_pitch = (w * bpp / 8 + 63) & ~63;
+    uint32_t scratch_pitch = RADEON_ALIGN(w * bpp / 8, 64);
     uint32_t swap = RADEON_HOST_DATA_SWAP_NONE;
     Bool r;
     int i;
@@ -565,7 +565,7 @@ RADEONDownloadFromScreenCS(PixmapPtr pSrc, int x, int y, int w,
     uint32_t src_domain = 0;
     uint32_t src_pitch_offset;
     unsigned bpp = pSrc->drawable.bitsPerPixel;
-    uint32_t scratch_pitch = (w * bpp / 8 + 63) & ~63;
+    uint32_t scratch_pitch = RADEON_ALIGN(w * bpp / 8, 64);
     uint32_t swap = RADEON_HOST_DATA_SWAP_NONE;
     Bool r;
 
@@ -667,7 +667,7 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h,
     RINFO_FROM_SCREEN(pSrc->drawable.pScreen);
     uint8_t	  *src	     = info->FB + exaGetPixmapOffset(pSrc);
     int		   bpp	     = pSrc->drawable.bitsPerPixel;
-    uint32_t datatype, src_pitch_offset, scratch_pitch = (w * bpp/8 + 63) & ~63, scratch_off = 0;
+    uint32_t datatype, src_pitch_offset, scratch_pitch = RADEON_ALIGN(w * bpp / 8, 64), scratch_off = 0;
     drmBufPtr scratch;
 
     TRACE;
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index 15f4326..e68faff 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -263,7 +263,7 @@ static Bool RADEONPitchMatches(PixmapPtr pPix)
     int h = pPix->drawable.height;
     uint32_t txpitch = exaGetPixmapPitch(pPix);
 
-    if (h > 1 && ((w * pPix->drawable.bitsPerPixel / 8 + 31) & ~31) != txpitch)
+    if (h > 1 && (RADEON_ALIGN(w * pPix->drawable.bitsPerPixel / 8, 32)) != txpitch)
 	return FALSE;
 
     return TRUE;
diff --git a/src/radeon_modes.c b/src/radeon_modes.c
index e440b59..d5635c9 100644
--- a/src/radeon_modes.c
+++ b/src/radeon_modes.c
@@ -67,18 +67,18 @@ void RADEONSetPitch (ScrnInfoPtr pScrn)
     /* FIXME: May need to validate line pitch here */
     if (info->ChipFamily < CHIP_FAMILY_R600) {
 	switch (pScrn->depth / 8) {
-	case 1: pitch_mask = align_large ? 255 : 127;
+	case 1: pitch_mask = align_large ? 256 : 128;
 	    break;
-	case 2: pitch_mask = align_large ? 127 : 31;
+	case 2: pitch_mask = align_large ? 128 : 32;
 	    break;
 	case 3:
-	case 4: pitch_mask = align_large ? 63 : 15;
+	case 4: pitch_mask = align_large ? 64 : 16;
 	    break;
 	}
     } else
-	pitch_mask = 255; /* r6xx/r7xx need 256B alignment for accel */
+	pitch_mask = 256; /* r6xx/r7xx need 256B alignment for accel */
 
-    dummy = (pScrn->virtualX + pitch_mask) & ~pitch_mask;
+    dummy = RADEON_ALIGN(pScrn->virtualX, pitch_mask);
     pScrn->displayWidth = dummy;
     info->CurrentLayout.displayWidth = pScrn->displayWidth;
 
diff --git a/src/radeon_render.c b/src/radeon_render.c
index 6668fe0..3b77345 100644
--- a/src/radeon_render.c
+++ b/src/radeon_render.c
@@ -406,11 +406,11 @@ static Bool FUNC_NAME(R100SetupTexture)(
     txformat = RadeonGetTextureFormat(format);
     tex_bytepp = PICT_FORMAT_BPP(format) >> 3;
 
-    dst_pitch = (width * tex_bytepp + 63) & ~63;
+    dst_pitch = RADEON_ALIGN(width * tex_bytepp, 64);
     size = dst_pitch * height;
 
     if ((flags & XAA_RENDER_REPEAT) && (height != 1) &&
-	(((width * tex_bytepp + 31) & ~31) != dst_pitch))
+	(RADEON_ALIGN(width * tex_bytepp, 32) != dst_pitch))
 	return FALSE;
 
 #ifndef ACCEL_CP
@@ -743,11 +743,11 @@ static Bool FUNC_NAME(R200SetupTexture)(
     txformat = RadeonGetTextureFormat(format);
     tex_bytepp = PICT_FORMAT_BPP(format) >> 3;
 
-    dst_pitch = (width * tex_bytepp + 63) & ~63;
+    dst_pitch = RADEON_ALIGN(width * tex_bytepp, 64);
     size = dst_pitch * height;
 
     if ((flags & XAA_RENDER_REPEAT) && (height != 1) &&
-	(((width * tex_bytepp + 31) & ~31) != dst_pitch))
+	(RADEON_ALIGN(width * tex_bytepp, 32) != dst_pitch))
 	return FALSE;
 
 #ifndef ACCEL_CP
diff --git a/src/radeon_textured_video.c b/src/radeon_textured_video.c
index 29910d0..1490ccb 100644
--- a/src/radeon_textured_video.c
+++ b/src/radeon_textured_video.c
@@ -281,34 +281,34 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn,
     }
 
     if (info->ChipFamily >= CHIP_FAMILY_R600)
-	hw_align = 255;
+	hw_align = 256;
     else
-	hw_align = 63;
+	hw_align = 64;
 
     switch(id) {
     case FOURCC_YV12:
     case FOURCC_I420:
-	srcPitch = (width + 3) & ~3;
-	srcPitch2 = ((width >> 1) + 3) & ~3;
+	srcPitch = RADEON_ALIGN(width, 4);
+	srcPitch2 = RADEON_ALIGN(width >> 1, 4);
         if (pPriv->bicubic_state != BICUBIC_OFF) {
-	    dstPitch = ((dst_width << 1) + hw_align) & ~hw_align;
+	    dstPitch = RADEON_ALIGN(dst_width << 1, hw_align);
 	    dstPitch2 = 0;
 	} else {
-	    dstPitch = (dst_width + hw_align) & ~hw_align;
-	    dstPitch2 = ((dstPitch >> 1) + hw_align) & ~hw_align;
+	    dstPitch = RADEON_ALIGN(dst_width, hw_align);
+	    dstPitch2 = RADEON_ALIGN(dstPitch >> 1, hw_align);
 	}
 	break;
     case FOURCC_UYVY:
     case FOURCC_YUY2:
     default:
-	dstPitch = ((dst_width << 1) + hw_align) & ~hw_align;
+	dstPitch = RADEON_ALIGN(dst_width << 1, hw_align);
 	srcPitch = (width << 1);
 	srcPitch2 = 0;
 	break;
     }
 
     size = dstPitch * dst_height + 2 * dstPitch2 * ((dst_height + 1) >> 1);
-    size = (size + hw_align) & ~hw_align;
+    size = RADEON_ALIGN(size, hw_align);
 
     if (pPriv->video_memory != NULL && size != pPriv->size) {
 	radeon_legacy_free_memory(pScrn, pPriv->video_memory);
@@ -318,7 +318,7 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn,
     if (pPriv->video_memory == NULL) {
 	pPriv->video_offset = radeon_legacy_allocate_memory(pScrn,
 							    &pPriv->video_memory,
-							    size, hw_align + 1,
+							    size, hw_align,
 							    RADEON_GEM_DOMAIN_GTT);
 	if (pPriv->video_offset == 0)
 	    return BadAlloc;
@@ -326,7 +326,7 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn,
 	if (info->cs) {
 	    pPriv->src_bo[0] = pPriv->video_memory;
 	    radeon_legacy_allocate_memory(pScrn, (void*)&pPriv->src_bo[1], size,
-					  hw_align + 1,
+					  hw_align,
 					  RADEON_GEM_DOMAIN_GTT);
 	}
     }
@@ -364,7 +364,7 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn,
 
     /* copy data */
     top = (y1 >> 16) & ~1;
-    nlines = ((((y2 + 0xffff) >> 16) + 1) & ~1) - top;
+    nlines = RADEON_ALIGN((y2 + 0xffff) >> 16, 2) - top;
 
     pPriv->src_offset = pPriv->video_offset;
     if (info->cs) {
@@ -387,9 +387,9 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn,
     pPriv->src_pitch = dstPitch;
 
     pPriv->planeu_offset = dstPitch * dst_height;
-    pPriv->planeu_offset = (pPriv->planeu_offset + hw_align) & ~hw_align;
+    pPriv->planeu_offset = RADEON_ALIGN(pPriv->planeu_offset, hw_align);
     pPriv->planev_offset = pPriv->planeu_offset + dstPitch2 * ((dst_height + 1) >> 1);
-    pPriv->planev_offset = (pPriv->planev_offset + hw_align) & ~hw_align;
+    pPriv->planev_offset = RADEON_ALIGN(pPriv->planev_offset, hw_align);
 
     pPriv->size = size;
     pPriv->pDraw = pDraw;
@@ -397,7 +397,7 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn,
     switch(id) {
     case FOURCC_YV12:
     case FOURCC_I420:
-	s2offset = srcPitch * ((height + 1) & ~1);
+	s2offset = srcPitch * (RADEON_ALIGN(height, 2));
 	s3offset = s2offset + (srcPitch2 * ((height + 1) >> 1));
 	s2offset += ((top >> 1) * srcPitch2);
 	s3offset += ((top >> 1) * srcPitch2);
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index 92dbe90..65a30b8 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -216,7 +216,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 
 	txsize = (((((pPriv->w + 1 ) >> 1) - 1) & 0x7ff) |
 		  (((((pPriv->h + 1 ) >> 1) - 1) & 0x7ff) << RADEON_TEX_VSIZE_SHIFT));
-	txpitch = ((pPriv->src_pitch >> 1) + 63) & ~63;
+	txpitch = RADEON_ALIGN(pPriv->src_pitch >> 1, 64);
 	txpitch -= 32;
 
 	BEGIN_ACCEL_RELOC(23, 3);
@@ -648,7 +648,7 @@ FUNC_NAME(R200DisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
 
 	txsize = (((((pPriv->w + 1 ) >> 1) - 1) & 0x7ff) |
 		  (((((pPriv->h + 1 ) >> 1) - 1) & 0x7ff) << RADEON_TEX_VSIZE_SHIFT));
-	txpitch = ((pPriv->src_pitch >> 1) + 63) & ~63;
+	txpitch = RADEON_ALIGN(pPriv->src_pitch >> 1, 64);
 	txpitch -= 32;
 
 	BEGIN_ACCEL_RELOC(36, 3);
@@ -1191,7 +1191,7 @@ FUNC_NAME(R300DisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
 	txformat0 = ((((((pPriv->w + 1 ) >> 1) - 1) & 0x7ff) << R300_TXWIDTH_SHIFT) |
 		     (((((pPriv->h + 1 ) >> 1 ) - 1) & 0x7ff) << R300_TXHEIGHT_SHIFT) |
 		     R300_TXPITCH_EN);
-	txpitch = ((pPriv->src_pitch >> 1) + 63) & ~63;
+	txpitch = RADEON_ALIGN(pPriv->src_pitch >> 1, 64);
 	txpitch -= 1;
 	txfilter = (R300_TX_CLAMP_S(R300_TX_CLAMP_CLAMP_LAST) |
 		    R300_TX_CLAMP_T(R300_TX_CLAMP_CLAMP_LAST) |
@@ -2652,7 +2652,7 @@ FUNC_NAME(R500DisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
 	txformat0 = ((((((pPriv->w + 1 ) >> 1) - 1) & 0x7ff) << R300_TXWIDTH_SHIFT) |
 		     (((((pPriv->h + 1 ) >> 1 ) - 1) & 0x7ff) << R300_TXHEIGHT_SHIFT) |
 		     R300_TXPITCH_EN);
-	txpitch = ((pPriv->src_pitch >> 1) + 63) & ~63;
+	txpitch = RADEON_ALIGN(pPriv->src_pitch >> 1, 64);
 	txpitch -= 1;
 	txfilter = (R300_TX_CLAMP_S(R300_TX_CLAMP_CLAMP_LAST) |
 		    R300_TX_CLAMP_T(R300_TX_CLAMP_CLAMP_LAST) |
diff --git a/src/radeon_video.c b/src/radeon_video.c
index 335cac6..8f0917f 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
@@ -2906,7 +2906,7 @@ RADEONPutImage(
    case FOURCC_RGB16:
    case FOURCC_RGBT16:
 	dstPitch = width * 2;
-	srcPitch = (width * 2 + 3) & ~3;
+	srcPitch = RADEON_ALIGN(width * 2, 4);
 	break;
    case FOURCC_YV12:
    case FOURCC_I420:
@@ -2917,12 +2917,12 @@ RADEONPutImage(
 	    /* need 16bytes alignment for u,v plane, so 2 times that for width
 	       but blitter needs 64bytes alignment. 128byte is a waste but dstpitch
 	       for uv planes needs to be dstpitch yplane >> 1 for now. */
-	    dstPitch = ((width + 127) & ~127);
-	    srcPitch = (width + 3) & ~3;
+	    dstPitch = (RADEON_ALIGN(width, 128));
+	    srcPitch = RADEON_ALIGN(width, 4);
 	}
 	else {
 	    dstPitch = width * 2;
-	    srcPitch = (width + 3) & ~3;
+	    srcPitch = RADEON_ALIGN(width, 4);
 	    idconv = FOURCC_YUY2;
 	}
 	break;
@@ -2937,15 +2937,15 @@ RADEONPutImage(
 #ifdef XF86DRI
    if (info->directRenderingEnabled && info->DMAForXv) {
        /* The upload blit only supports multiples of 64 bytes */
-       dstPitch = (dstPitch + 63) & ~63;
+       dstPitch = RADEON_ALIGN(dstPitch, 64);
    } else
 #endif
        /* The overlay only supports multiples of 16 bytes */
-       dstPitch = (dstPitch + 15) & ~15;
+       dstPitch = RADEON_ALIGN(dstPitch, 16);
 
    new_size = dstPitch * height;
    if (idconv == FOURCC_YV12 || id == FOURCC_I420) {
-      new_size += (dstPitch >> 1) * ((height + 1) & ~1);
+      new_size += (dstPitch >> 1) * (RADEON_ALIGN(height, 2));
    }
    pPriv->video_offset = radeon_legacy_allocate_memory(pScrn, &pPriv->video_memory,
 						       (pPriv->doubleBuffer ?
@@ -2959,7 +2959,7 @@ RADEONPutImage(
     /* copy data */
    top = ya >> 16;
    left = (xa >> 16) & ~1;
-   npixels = ((((xb + 0xffff) >> 16) + 1) & ~1) - left;
+   npixels = (RADEON_ALIGN((xb + 0xffff) >> 16, 2)) - left;
 
    offset = (pPriv->video_offset) + (top * dstPitch);
 
@@ -2981,9 +2981,9 @@ RADEONPutImage(
 	    /* meh. Such a mess just for someone who wants to watch half the video clipped */
 	    top &= ~1;
 	    /* odd number of pixels? That may not work correctly */
-	    srcPitch2 = ((width >> 1) + 3) & ~3;
+	    srcPitch2 = RADEON_ALIGN(width >> 1, 4);
 	    /* odd number of lines? Maybe... */
-	    s2offset = srcPitch * ((height + 1) & ~1);
+	    s2offset = srcPitch * (RADEON_ALIGN(height, 2));
 	    s3offset = s2offset + srcPitch2 * ((height + 1) >> 1);
 	    s2offset += (top >> 1) * srcPitch2 + (left >> 1);
 	    s3offset += (top >> 1) * srcPitch2 + (left >> 1);
@@ -3006,7 +3006,7 @@ RADEONPutImage(
 	}
 	else {
 	    s2offset = srcPitch * height;
-	    srcPitch2 = ((width >> 1) + 3) & ~3;
+	    srcPitch2 = RADEON_ALIGN(width >> 1, 4);
 	    s3offset = (srcPitch2 * (height >> 1)) + s2offset;
 	    top &= ~1;
 	    dst_start += left << 1;
@@ -3018,7 +3018,7 @@ RADEONPutImage(
 		s2offset = s3offset;
 		s3offset = tmp;
 	    }
-	    nlines = ((((yb + 0xffff) >> 16) + 1) & ~1) - top;
+	    nlines = (RADEON_ALIGN((yb + 0xffff) >> 16, 2)) - top;
 	    RADEONCopyMungedData(pScrn, buf + (top * srcPitch) + left,
 				 buf + s2offset, buf + s3offset, dst_start,
 				 srcPitch, srcPitch2, dstPitch, nlines, npixels);
@@ -3086,18 +3086,18 @@ RADEONQueryImageAttributes(
     if(*w > info->xv_max_width) *w = info->xv_max_width;
     if(*h > info->xv_max_height) *h = info->xv_max_height;
 
-    *w = (*w + 1) & ~1;
+    *w = RADEON_ALIGN(*w, 2);
     if(offsets) offsets[0] = 0;
 
     switch(id) {
     case FOURCC_YV12:
     case FOURCC_I420:
-	*h = (*h + 1) & ~1;
-	size = (*w + 3) & ~3;
+	*h = RADEON_ALIGN(*h, 2);
+	size = RADEON_ALIGN(*w, 4);
 	if(pitches) pitches[0] = size;
 	size *= *h;
 	if(offsets) offsets[1] = size;
-	tmp = ((*w >> 1) + 3) & ~3;
+	tmp = RADEON_ALIGN(*w >> 1, 4);
 	if(pitches) pitches[1] = pitches[2] = tmp;
 	tmp *= (*h >> 1);
 	size += tmp;
@@ -3176,8 +3176,8 @@ RADEONAllocateSurface(
     if((w > 1024) || (h > 1024))
 	return BadAlloc;
 
-    w = (w + 1) & ~1;
-    pitch = ((w << 1) + 15) & ~15;
+    w = RADEON_ALIGN(w, 2);
+    pitch = RADEON_ALIGN(w << 1, 16);
     size = pitch * h;
 
     offset = radeon_legacy_allocate_memory(pScrn, &surface_memory, size, 64,
@@ -3493,21 +3493,21 @@ RADEONPutVideo(
    case FOURCC_YV12:
    case FOURCC_I420:
         top &= ~1;
-        dstPitch = ((width << 1) + 15) & ~15;
-        srcPitch = (width + 3) & ~3;
+        dstPitch = RADEON_ALIGN(width << 1, 16);
+        srcPitch = RADEON_ALIGN(width, 4);
         s2offset = srcPitch * height;
-        srcPitch2 = ((width >> 1) + 3) & ~3;
+        srcPitch2 = RADEON_ALIGN(width >> 1, 4);
         s3offset = (srcPitch2 * (height >> 1)) + s2offset;
         break;
    case FOURCC_UYVY:
    case FOURCC_YUY2:
    default:
-        dstPitch = ((width<<1) + 15) & ~15;
+        dstPitch = RADEON_ALIGN(width<<1, 16);
         srcPitch = (width<<1);
         break;
    }
 #else
-   dstPitch = ((width<<1) + 15) & ~15;
+   dstPitch = RADEON_ALIGN(width << 1, 16);
    srcPitch = (width<<1);
 #endif
 
@@ -3535,20 +3535,20 @@ RADEONPutVideo(
    switch(pPriv->overlay_deinterlacing_method){
         case METHOD_BOB:
         case METHOD_SINGLE:
-           offset1 = (pPriv->video_offset + 0xf) & (~0xf);
-           offset2 = (pPriv->video_offset + new_size + 0xf) & (~0xf);
+           offset1 = RADEON_ALIGN(pPriv->video_offset, 0x10);
+           offset2 = RADEON_ALIGN(pPriv->video_offset + new_size, 0x10);
            offset3 = offset1;
            offset4 = offset2;
            break;
         case METHOD_WEAVE:
-           offset1 = (pPriv->video_offset + 0xf) & (~0xf);
+           offset1 = RADEON_ALIGN(pPriv->video_offset, 0x10);
            offset2 = offset1+dstPitch;
-           offset3 = (pPriv->video_offset + 2 * new_size + 0xf) & (~0xf);
+           offset3 = RADEON_ALIGN(pPriv->video_offset + 2 * new_size, 0x10);
            offset4 = offset3+dstPitch;
            break;
         default:
-           offset1 = (pPriv->video_offset + 0xf) & (~0xf);
-           offset2 = (pPriv->video_offset + new_size + 0xf) & (~0xf);
+           offset1 = RADEON_ALIGN(pPriv->video_offset, 0x10);
+           offset2 = RADEON_ALIGN(pPriv->video_offset + new_size, 0x10);
            offset3 = offset1;
            offset4 = offset2;
         }
@@ -3571,7 +3571,7 @@ RADEONPutVideo(
             vbi_end = 20;
         }
 
-        vbi_offset0 = (pPriv->video_offset + mult * new_size * bpp + 0xf) & (~0xf);
+        vbi_offset0 = RADEON_ALIGN(pPriv->video_offset + mult * new_size * bpp, 0x10);
         vbi_offset1 = vbi_offset0 + dstPitch*20;
         OUTREG(RADEON_CAP0_VBI0_OFFSET, vbi_offset0+display_base);
         OUTREG(RADEON_CAP0_VBI1_OFFSET, vbi_offset1+display_base);
-- 
1.6.4.4



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