xf86-video-ati: Branch 'master'
Michel Dänzer
michel at daenzer.net
Wed Feb 11 00:33:59 PST 2009
On Tue, 2009-02-10 at 14:11 -0800, Alex Deucher wrote:
>
> commit 0c4694c58f2ec152b19023626bc7ced891d9da65
> Author: Alex Deucher <alexdeucher at gmail.com>
> Date: Tue Feb 10 17:08:37 2009 -0500
>
> Radeon EXA: wait for the engine to be idle before sw access
>
> Really we need proper fencing with timestamps but this should
> help in the short term.
>
> This should help with minor corruption issues and possibly
> lockups.
Not really sure why this would help:
> @@ -872,6 +889,8 @@ RADEONHostDataBlitCopyPass(
> /* RADEONHostDataBlitCopy can return NULL ! */
> if( (dst==NULL) || (src==NULL)) return;
>
> + RADEONWaitforIdlePoll(pScrn);
> +
> if ( dstPitch == srcPitch )
> {
> #if X_BYTE_ORDER == X_BIG_ENDIAN
We shouldn't need to wait for idle before writing to GART memory.
> diff --git a/src/radeon_exa.c b/src/radeon_exa.c
> index c4bc1bb..ebe65d1 100644
> --- a/src/radeon_exa.c
> +++ b/src/radeon_exa.c
> @@ -220,17 +220,22 @@ int RADEONBiggerCrtcArea(PixmapPtr pPix)
> }
>
> #if X_BYTE_ORDER == X_BIG_ENDIAN
> -
> static unsigned long swapper_surfaces[3];
> +#endif /* X_BYTE_ORDER == X_BIG_ENDIAN */
>
> static Bool RADEONPrepareAccess(PixmapPtr pPix, int index)
> {
> RINFO_FROM_SCREEN(pPix->drawable.pScreen);
> +#if X_BYTE_ORDER == X_BIG_ENDIAN
> unsigned char *RADEONMMIO = info->MMIO;
> uint32_t offset = exaGetPixmapOffset(pPix);
> int bpp, soff;
> uint32_t size, flags;
> +#endif /* X_BYTE_ORDER == X_BIG_ENDIAN */
> +
> + RADEONWaitforIdlePoll(pScrn);
The EXA core calls RADEONSync before software access, so the
PrepareAccess hook really shouldn't be necessary; if RADEONSync doesn't
wait for idle when it should, let's fix that.
> diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c
> index cd97cc6..eb714ab 100644
> --- a/src/radeon_exa_funcs.c
> +++ b/src/radeon_exa_funcs.c
> @@ -408,6 +408,8 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h,
> while ((drmCommandNone(info->dri->drmFD, DRM_RADEON_CP_IDLE) == -EBUSY)
> && (i++ < RADEON_TIMEOUT))
> ;
> + /* make sure the engine is idle */
> + RADEONWaitforIdlePoll(pScrn);
The DRM_RADEON_CP_IDLE ioctl already waits for idle. If it doesn't do so
properly, let's fix it.
--
Earthling Michel Dänzer | http://www.vmware.com
Libre software enthusiast | Debian, X and DRI developer
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