[PATCH] radeon: Fix PCI usage of 32-bit driver on 64-bit platform

[Benjamin Herrenschmidt]

Hi !

The radeon driver is storing PCI addresses in unsigned long's which
won't work well on 32-bit platforms with 64-bit physical address space
such as PowerPC 4xx. This fixes it by using unsigned long long instead.

Signed-off-by: Benjamin Herrenschmidt <benh at kernel.crashing.org>
---

index f7ae1a8..e7ccfa9 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -648,9 +648,9 @@ typedef struct {
     RADEONChipFamily  ChipFamily;
     RADEONErrata      ChipErrata;
 
-    unsigned long     LinearAddr;       /* Frame buffer physical address     */
-    unsigned long     MMIOAddr;         /* MMIO region physical address      */
-    unsigned long     BIOSAddr;         /* BIOS physical address             */
+    unsigned long long     LinearAddr;       /* Frame buffer physical address     */
+    unsigned long long     MMIOAddr;         /* MMIO region physical address      */
+    unsigned long long     BIOSAddr;         /* BIOS physical address             */
     uint32_t          fbLocation;
     uint32_t          gartLocation;
     uint32_t          mc_fb_location;
index c759bd6..138bbc8 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -429,7 +429,7 @@ static Bool RADEONMapFB(ScrnInfoPtr pScrn)
     RADEONInfoPtr  info = RADEONPTR(pScrn);
 
     xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
-		   "Map: 0x%08lx, 0x%08lx\n", info->LinearAddr, info->FbMapSize);
+		   "Map: 0x%016llx, 0x%08lx\n", info->LinearAddr, info->FbMapSize);
 
 #ifndef XSERVER_LIBPCIACCESS
 
@@ -1745,11 +1745,11 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
     }
 
     from               = X_PROBED;
-    info->LinearAddr   = PCI_REGION_BASE(info->PciInfo, 0, REGION_MEM) & ~0x1ffffffUL;
+    info->LinearAddr   = PCI_REGION_BASE(info->PciInfo, 0, REGION_MEM) & ~0x1ffffffULL;
     pScrn->memPhysBase = info->LinearAddr;
     if (dev->MemBase) {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		   "Linear address override, using 0x%016lx instead of 0x%016lx\n",
+		   "Linear address override, using 0x%016lx instead of 0x%016llx\n",
 		   dev->MemBase,
 		   info->LinearAddr);
 	info->LinearAddr = dev->MemBase;
@@ -1760,7 +1760,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
 	return FALSE;
     }
     xf86DrvMsg(pScrn->scrnIndex, from,
-	       "Linear framebuffer at 0x%016lx\n", info->LinearAddr);
+	       "Linear framebuffer at 0x%016llx\n", info->LinearAddr);
 
 #ifndef XSERVER_LIBPCIACCESS
 				/* BIOS */
@@ -2742,11 +2742,13 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
     info->PciTag  = pciTag(PCI_DEV_BUS(info->PciInfo),
 			   PCI_DEV_DEV(info->PciInfo),
 			   PCI_DEV_FUNC(info->PciInfo));
-    info->MMIOAddr = PCI_REGION_BASE(info->PciInfo, 2, REGION_MEM) & ~0xffUL;
+    info->MMIOAddr = PCI_REGION_BASE(info->PciInfo, 2, REGION_MEM) & ~0xffULL;
     info->MMIOSize = PCI_REGION_SIZE(info->PciInfo, 2);
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "TOTO SAYS %016llx\n", 
+		(unsigned long long)info->PciInfo->regions[2].base_addr);
     if (info->pEnt->device->IOBase) {
 	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-		   "MMIO address override, using 0x%08lx instead of 0x%08lx\n",
+		   "MMIO address override, using 0x%08lx instead of 0x%016llx\n",
 		   info->pEnt->device->IOBase,
 		   info->MMIOAddr);
 	info->MMIOAddr = info->pEnt->device->IOBase;
@@ -2755,7 +2757,7 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
 	goto fail1;
     }
     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-	       "MMIO registers at 0x%016lx: size %ldKB\n", info->MMIOAddr, info->MMIOSize / 1024);
+	       "MMIO registers at 0x%016llx: size %ldKB\n", info->MMIOAddr, info->MMIOSize / 1024);
 
     if(!RADEONMapMMIO(pScrn)) {
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,