[PATCH] xfree86: Add Loongson MIPS support
Mark Kettenis
mark.kettenis at xs4all.nl
Sat Oct 15 15:20:42 PDT 2011
> Date: Thu, 13 Oct 2011 20:26:18 -0700
> From: Matt Kraai <kraai at ftbfs.org>
>
> > Also, that code is pretty much going to be made obsolete by Jeremy
> > Huddleston's pci bus cleanup diff. A better approach would be to
> > convert the relevant drivers for loongson to use the new pci_io_xxx
> > interfaces in libpciaccess instead of the raw in/out calls.
>
> My system uses the siliconmotion driver. Would I need to start with
> the instructions at
>
> http://www.x.org/wiki/PciReworkHowto
The work described there has already been done some time ago.
> and then replace the raw in/out calls?
Yes. You'd want something like the (untested) diff below. Should
work if you have a recent enough libpciaccess.
This raises the question how far one should go in providing backwards
compatibility in the drivers for older libpciaccess libraries. Do we
need to worry about that at all?
diff --git a/src/regsmi.h b/src/regsmi.h
index 5dd0320..1bfc886 100644
--- a/src/regsmi.h
+++ b/src/regsmi.h
@@ -64,8 +64,8 @@ VGAIN8_INDEX(SMIPtr pSmi, int indexPort, int dataPort, CARD8 index)
MMIO_OUT8(pSmi->IOBase, indexPort, index);
return(MMIO_IN8(pSmi->IOBase, dataPort));
} else {
- outb(pSmi->PIOBase + indexPort, index);
- return(inb(pSmi->PIOBase + dataPort));
+ pci_io_write8(pSmi->PIOBase, indexPort, index);
+ return(pci_io_read8(pSmi->PIOBase, dataPort));
}
}
@@ -76,8 +76,8 @@ VGAOUT8_INDEX(SMIPtr pSmi, int indexPort, int dataPort, CARD8 index, CARD8 data)
MMIO_OUT8(pSmi->IOBase, indexPort, index);
MMIO_OUT8(pSmi->IOBase, dataPort, data);
} else {
- outb(pSmi->PIOBase + indexPort, index);
- outb(pSmi->PIOBase + dataPort, data);
+ pci_io_write8(pSmi->PIOBase, indexPort, index);
+ pci_io_write8(pSmi->PIOBase, dataPort, data);
}
}
@@ -87,7 +87,7 @@ VGAIN8(SMIPtr pSmi, int port)
if (pSmi->IOBase) {
return(MMIO_IN8(pSmi->IOBase, port));
} else {
- return(inb(pSmi->PIOBase + port));
+ return(pci_io_read8(pSmi->PIOBase, port));
}
}
@@ -97,7 +97,7 @@ VGAOUT8(SMIPtr pSmi, int port, CARD8 data)
if (pSmi->IOBase) {
MMIO_OUT8(pSmi->IOBase, port, data);
} else {
- outb(pSmi->PIOBase + port, data);
+ pci_io_write8(pSmi->PIOBase, port, data);
}
}
diff --git a/src/smi.h b/src/smi.h
index 0f72db9..a8e1014 100644
--- a/src/smi.h
+++ b/src/smi.h
@@ -217,7 +217,11 @@ typedef struct
CARD8 * DataPortBase; /* Base of data port */
int DataPortSize; /* Size of data port */
CARD8 * IOBase; /* Base of MMIO VGA ports */
+#ifndef XSERVER_LIBPCIACCESS
IOADDRESS PIOBase; /* Base of I/O ports */
+#else
+ struct pci_io_handle *PIOBase; /* Legacy I/O ports */
+#endif
unsigned char * FBBase; /* Base of FB */
CARD32 fbMapOffset; /* offset for fb mapping */
CARD32 FBOffset; /* Current visual FB starting
diff --git a/src/smi_driver.c b/src/smi_driver.c
index 9c10e46..b3f9b58 100644
--- a/src/smi_driver.c
+++ b/src/smi_driver.c
@@ -442,7 +442,11 @@ SMI_PreInit(ScrnInfoPtr pScrn, int flags)
LEAVE(FALSE);
hwp = VGAHWPTR(pScrn);
+#ifndef XSERVER_LIBPCIACCESS
pSmi->PIOBase = hwp->PIOOffset;
+#else
+ pSmi->PIOBase = pci_legacy_open_io(pSmi->PciInfo, 0, 0x400);
+#endif
xf86ErrorFVerb(VERBLEV, "\tSMI_PreInit vgaCRIndex=%x, vgaIOBase=%x, "
"MMIOBase=%p\n", hwp->IOBase + VGA_CRTC_INDEX_OFFSET,
@@ -2016,16 +2020,16 @@ SMI_EnableMmio(ScrnInfoPtr pScrn)
vgaHWSetStdFuncs(hwp);
/* Enable linear mode */
- outb(pSmi->PIOBase + VGA_SEQ_INDEX, 0x18);
- tmp = inb(pSmi->PIOBase + VGA_SEQ_DATA);
+ pci_io_write8(pSmi->PIOBase, VGA_SEQ_INDEX, 0x18);
+ tmp = pci_io_read8(pSmi->PIOBase, VGA_SEQ_DATA);
pSmi->SR18Value = tmp; /* PDR#521 */
- outb(pSmi->PIOBase + VGA_SEQ_DATA, tmp | 0x11);
+ pci_io_write8(pSmi->PIOBase, VGA_SEQ_DATA, tmp | 0x11);
/* Enable 2D/3D Engine and Video Processor */
- outb(pSmi->PIOBase + VGA_SEQ_INDEX, 0x21);
- tmp = inb(pSmi->PIOBase + VGA_SEQ_DATA);
+ pci_io_write8(pSmi->PIOBase, VGA_SEQ_INDEX, 0x21);
+ tmp = pci_io_read8(pSmi->PIOBase, VGA_SEQ_DATA);
pSmi->SR21Value = tmp; /* PDR#521 */
- outb(pSmi->PIOBase + VGA_SEQ_DATA, tmp & ~0x03);
+ pci_io_write8(pSmi->PIOBase, VGA_SEQ_DATA, tmp & ~0x03);
}
LEAVE();
@@ -2044,12 +2048,12 @@ SMI_DisableMmio(ScrnInfoPtr pScrn)
vgaHWSetStdFuncs(hwp);
/* Disable 2D/3D Engine and Video Processor */
- outb(pSmi->PIOBase + VGA_SEQ_INDEX, 0x21);
- outb(pSmi->PIOBase + VGA_SEQ_DATA, pSmi->SR21Value); /* PDR#521 */
+ pci_io_write8(pSmi->PIOBase, VGA_SEQ_INDEX, 0x21);
+ pci_io_write8(pSmi->PIOBase, VGA_SEQ_DATA, pSmi->SR21Value); /* PDR#521 */
/* Disable linear mode */
- outb(pSmi->PIOBase + VGA_SEQ_INDEX, 0x18);
- outb(pSmi->PIOBase + VGA_SEQ_DATA, pSmi->SR18Value); /* PDR#521 */
+ pci_io_write8(pSmi->PIOBase, VGA_SEQ_INDEX, 0x18);
+ pci_io_write8(pSmi->PIOBase, VGA_SEQ_DATA, pSmi->SR18Value); /* PDR#521 */
}
LEAVE();
diff --git a/src/smilynx_crtc.c b/src/smilynx_crtc.c
index fb7183c..67c3f52 100644
--- a/src/smilynx_crtc.c
+++ b/src/smilynx_crtc.c
@@ -619,9 +619,9 @@ SMILynx_CrtcModeSet_bios(xf86CrtcPtr crtc,
xf86ExecX86int10(pSmi->pInt10);
/* Enable linear mode. */
- outb(pSmi->PIOBase + VGA_SEQ_INDEX, 0x18);
- tmp = inb(pSmi->PIOBase + VGA_SEQ_DATA);
- outb(pSmi->PIOBase + VGA_SEQ_DATA, tmp | 0x01);
+ pci_io_write8(pSmi->PIOBase, VGA_SEQ_INDEX, 0x18);
+ tmp = pci_io_read8(pSmi->PIOBase, VGA_SEQ_DATA);
+ pci_io_write8(pSmi->PIOBase, VGA_SEQ_DATA, tmp | 0x01);
/* Enable DPR/VPR registers. */
tmp = VGAIN8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x21);
diff --git a/src/smilynx_hw.c b/src/smilynx_hw.c
index 019261d..3cfbb87 100644
--- a/src/smilynx_hw.c
+++ b/src/smilynx_hw.c
@@ -365,9 +365,9 @@ SMILynx_WriteMode(ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr, SMIRegPtr restore)
xf86ExecX86int10(pSmi->pInt10);
/* Enable linear mode. */
- outb(pSmi->PIOBase + VGA_SEQ_INDEX, 0x18);
- tmp = inb(pSmi->PIOBase + VGA_SEQ_DATA);
- outb(pSmi->PIOBase + VGA_SEQ_DATA, tmp | 0x01);
+ pci_io_write8(pSmi->PIOBase, VGA_SEQ_INDEX, 0x18);
+ tmp = pci_io_read8(pSmi->PIOBase, VGA_SEQ_DATA);
+ pci_io_write8(pSmi->PIOBase, VGA_SEQ_DATA, tmp | 0x01);
/* Enable DPR/VPR registers. */
tmp = VGAIN8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x21);
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