Improvements to Intel DDX for implementation of DRI2 OML_sync_control extensions.

[Mario Kleiner]

They are against Jesse Barnes xf86-video-intel tree:

<http://cgit.freedesktop.org/~jbarnes/xf86-video-intel/log/>
git://people.freedesktop.org/~jbarnes/xf86-video-intel master branch

The tree is in the same state as when i wrote the patches - they are  
following commit

<http://cgit.freedesktop.org/~jbarnes/xf86-video-intel/commit/? 
id=dd1930673565e70ec247f7f96ca0bdc575eecfb0>

Ideas to fix? I'm a git newbie.

thanks,
-mario

On Mar 4, 2010, at 1:28 AM, Eric Anholt wrote:

> On Sun, 21 Feb 2010 18:45:46 +0100, Mario Kleiner  
> <mario.kleiner at tuebingen.mpg.de> wrote:
>> This series of 2 patches fixes issues in the Intel DDX implementation
>> of I830DRI2ScheduleWaitMSC() and I830DRI2ScheduleSwap().
>>
>> The previous implementation should mostly work in the simple
>> glXSwapBuffers() case, although it may reduce the maximum
>> swaprate to half the video refresh interval, e.g., max 30 fps
>> at a refresh of 60 Hz. It won't work correctly for the
>> glXSwapBuffersMscOML(target_msc, divisor, remainder) case if
>> divisor or remainder are non-zero or target_msc is not > 2
>> frames ahead of the current vblank count. It doesn't handle
>> the (msc % divisor) == remainder case correctly.
>>
>> A similar problem exists for calls to glXWaitForMscOML().
>>
>> These patches should fix above issues, or at least make
>> handling more robust.
>>
>> Jesse Barnes already had a look at these patches, but due to
>> lack of suitable hardware, i haven't tested them myself, not
>> even if they compile cleanly.
>>
>> Could somebody please give them some good testing and merge
>> them if appropriate?
>
> These don't seem to apply, and I can't quite work out what code  
> they're
> against

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Mario Kleiner
Max Planck Institute for Biological Cybernetics
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