Improvements to Intel DDX for implementation of DRI2 OML_sync_control extensions.

[Mario Kleiner]

This series of 2 patches fixes issues in the Intel DDX implementation
of I830DRI2ScheduleWaitMSC() and I830DRI2ScheduleSwap().

The previous implementation should mostly work in the simple
glXSwapBuffers() case, although it may reduce the maximum
swaprate to half the video refresh interval, e.g., max 30 fps
at a refresh of 60 Hz. It won't work correctly for the
glXSwapBuffersMscOML(target_msc, divisor, remainder) case if
divisor or remainder are non-zero or target_msc is not > 2
frames ahead of the current vblank count. It doesn't handle
the (msc % divisor) == remainder case correctly.

A similar problem exists for calls to glXWaitForMscOML().

These patches should fix above issues, or at least make
handling more robust.

Jesse Barnes already had a look at these patches, but due to
lack of suitable hardware, i haven't tested them myself, not
even if they compile cleanly.

Could somebody please give them some good testing and merge
them if appropriate?

Thanks,
-mario