what is the effect of RADEON_ALIGN (macros) in ATI-driver?
Hunk.Cui at amd.com
Wed Aug 11 19:55:05 PDT 2010
> >>> But I'm confused by the code, not really sure of the calculate:
> >>> YDstPitch = (width + 31) & ~31; & UVDstPitch = ((width >> 1) + 15)
> >>> ~15;
> >> '(variable + X) & ~X' is a common idiom to align the variable to
> >> next multiple of (X+1).
> > Thank you for your hints, Could you give more explanation and
> > some example to describe it? :)
> > I need more info about this. :)
> Some hardware requires that memory access be aligned to certain
> boundaries. Even on x86 CPUs this is true to some extent (aligned
> access is faster than unaligned).
> See the description of 'unaligned access' and the example at
> http://www.alexonlinux.com/aligned-vs-unaligned-memory-access also
> like a good description of what unaligned memory access is (it even
> pretty pictures).
I saw your info and many thanks for your help. :) But this info
are focus on bus error, refer to CPU "aligned" to a specific boundary,
such as 16 bits (addresses 0, 2, 4 can be accessed, addresses from 1, 3,
5, are unaligned) or 32 bits (0, 4, 8, 12 are aligned, all addresses
in-between are unaligned).
I want to know why the variable should add X (in '(variable +
X)'), what is the mainly intention? What are the different with HW
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