[PATCH 6/9] Use proper membar instructions on SPARC
Michael
macallan at netbsd.org
Wed Aug 12 23:53:19 PDT 2009
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Hello,
On Aug 13, 2009, at 2:28 AM, Matt Turner wrote:
> On Thu, Aug 13, 2009 at 1:51 AM, David Miller<davem at davemloft.net>
> wrote:
>> From: Matt Turner <mattst88 at gmail.com>
>> Date: Thu, 13 Aug 2009 01:45:39 -0400
>>
>>> Cc: David S. Miller <davem at davemloft.net>
>>> Cc: Alan Coopersmith <alan.coopersmith at sun.com>
>>> Signed-off-by: Matt Turner <mattst88 at gmail.com>
>>
>> This breaks 32-bit sparc.
>>
>> It will cause the binaries built to be tagged as needing v8plus or v9
>> instructions. They therefore won't execute or load on a 32-bit sparc
>> system.
>>
>> That's why I encoded the membars using explicit instruction
>> constants,
>> rather than using the usual mnemonics.
>
> Surely gcc defines a macro we can check for? Something like __sparcv9
> or __arch64__? What is preferred?
__arch64__ doesn't cut it - a 64bit SPARC isn't guaranteed to run in
64bit mode. I think gcc defines __sparcv9__ when the target allows v9
instructions ( and v8plus is more or less v9 running with 32bit
pointers but otherwise full access to v9 instructions IIRC )
> I wanted to do something like this, but I wasn't sure if (1) we needed
> to worry about 32-bit sparc or
NetBSD/sparc 5.0 ships with Xorg 1.4.2, I have 1.6.something working
on -current. I'm sure OpenBSD and Linux do the same.
> On another note, are load barriers not needed for in{b,w,l} and
> xf86ReadMmio* functions?
Usually SBus, PCI and UPA accesses on sparc are uncached and strongly
ordered. I'm not quite sure if that's 100% guaranteed though, and
there are graphics devices on sparc which are neither - they can put
barriers in their drivers when needed though. As far as I can tell no
SBus or UPA driver in Xorg uses any barrier macros. Only xf86-video-
sunffb uses membar #sync but there's no way you can get any of those
in a 32bit sparc.
have fun
Michael
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