xf86-video-intel: src/sna/sna_accel.c

[GitLab Mirror]

 src/sna/sna_accel.c |    2 ++
 1 file changed, 2 insertions(+)

New commits:
commit 7181c5a41c3f00eaf996caa156523c708a18081e
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Mon May 11 10:48:52 2020 +0100

    sna: Avoid selecting gen9 backend for future gen
    
    Cannonlake, then Icelake introduce new instruction formats and state
    command, and require a new render backend to be written. Avoid selecting
    the gen9 backend as this will hang!
    
    Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1864
    Fixes: 3d5a1238af6a ("sna: Restore blt fallback backend")
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index 6e14cf7b..4c067ae8 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -18242,6 +18242,8 @@ bool sna_accel_init(ScreenPtr screen, struct sna *sna)
 		sna_render_mark_wedged(sna);
 	} else if (sna_option_accel_blt(sna))
 		(void)backend;
+	else if (sna->kgem.gen >= 0120)
+		(void)backend; /* no render backend written yet */
 	else if (sna->kgem.gen >= 0110)
 		backend = gen9_render_init(sna, backend);
 	else if (sna->kgem.gen >= 0100)