xf86-video-intel: 2 commits - src/i915_pciids.h src/intel_module.c src/sna/sna_display.c test/dri3-test.c

Chris Wilson ickle at kemper.freedesktop.org
Mon Feb 27 20:43:17 UTC 2017


 src/i915_pciids.h     |   54 ++++++++++++++++++--------------------------------
 src/intel_module.c    |   16 ++------------
 src/sna/sna_display.c |   54 +++++++++++++++++++++++++++++++++++++++++++++++---
 test/dri3-test.c      |   11 ++--------
 4 files changed, 77 insertions(+), 58 deletions(-)

New commits:
commit e9cd8c211dcaba3bad4bc950a0a06b35766962ba
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Mon Feb 27 20:38:22 2017 +0000

    pciids: Update for missing Skylake IDs
    
    Sync with kernel commit ca7a45ba6fb9e7ceca56d10b91db29c2f3451a2e
    Author: MichaƂ Winiarski <michal.winiarski at intel.com>
    Date:   Mon Feb 27 12:22:56 2017 +0100
    
        drm/i915/skl: Add missing SKL ID
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/i915_pciids.h b/src/i915_pciids.h
index 0370f83..466c715 100644
--- a/src/i915_pciids.h
+++ b/src/i915_pciids.h
@@ -134,7 +134,7 @@
 #define INTEL_IVB_Q_IDS(info) \
 	INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */
 
-#define INTEL_HSW_D_IDS(info) \
+#define INTEL_HSW_IDS(info) \
 	INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
 	INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
 	INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
@@ -179,9 +179,7 @@
 	INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
 	INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \
 	INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \
-	INTEL_VGA_DEVICE(0x0D2E, info)  /* CRW GT3 reserved */ \
-
-#define INTEL_HSW_M_IDS(info) \
+	INTEL_VGA_DEVICE(0x0D2E, info),  /* CRW GT3 reserved */ \
 	INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
 	INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
 	INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \
@@ -198,17 +196,15 @@
 	INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \
 	INTEL_VGA_DEVICE(0x0D26, info)  /* CRW GT3 mobile */
 
-#define INTEL_VLV_M_IDS(info) \
+#define INTEL_VLV_IDS(info) \
 	INTEL_VGA_DEVICE(0x0f30, info), \
 	INTEL_VGA_DEVICE(0x0f31, info), \
 	INTEL_VGA_DEVICE(0x0f32, info), \
 	INTEL_VGA_DEVICE(0x0f33, info), \
-	INTEL_VGA_DEVICE(0x0157, info)
-
-#define INTEL_VLV_D_IDS(info) \
+	INTEL_VGA_DEVICE(0x0157, info), \
 	INTEL_VGA_DEVICE(0x0155, info)
 
-#define INTEL_BDW_GT12M_IDS(info)  \
+#define INTEL_BDW_GT12_IDS(info)  \
 	INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
 	INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
 	INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \
@@ -216,43 +212,32 @@
 	INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \
 	INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \
 	INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \
-	INTEL_VGA_DEVICE(0x161E, info)  /* GT2 ULX */
-
-#define INTEL_BDW_GT12D_IDS(info) \
+	INTEL_VGA_DEVICE(0x161E, info),  /* GT2 ULX */ \
 	INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
 	INTEL_VGA_DEVICE(0x160D, info), /* GT1 Workstation */ \
 	INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \
 	INTEL_VGA_DEVICE(0x161D, info)  /* GT2 Workstation */
 
-#define INTEL_BDW_GT3M_IDS(info) \
+#define INTEL_BDW_GT3_IDS(info) \
 	INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
 	INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
 	INTEL_VGA_DEVICE(0x162B, info), /* Iris */ \
-	INTEL_VGA_DEVICE(0x162E, info)  /* ULX */
-
-#define INTEL_BDW_GT3D_IDS(info) \
+	INTEL_VGA_DEVICE(0x162E, info),  /* ULX */\
 	INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
 	INTEL_VGA_DEVICE(0x162D, info)  /* Workstation */
 
-#define INTEL_BDW_RSVDM_IDS(info) \
+#define INTEL_BDW_RSVD_IDS(info) \
 	INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \
 	INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \
 	INTEL_VGA_DEVICE(0x163B, info), /* Iris */ \
-	INTEL_VGA_DEVICE(0x163E, info)  /* ULX */
-
-#define INTEL_BDW_RSVDD_IDS(info) \
+	INTEL_VGA_DEVICE(0x163E, info), /* ULX */ \
 	INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
 	INTEL_VGA_DEVICE(0x163D, info)  /* Workstation */
 
-#define INTEL_BDW_M_IDS(info) \
-	INTEL_BDW_GT12M_IDS(info), \
-	INTEL_BDW_GT3M_IDS(info), \
-	INTEL_BDW_RSVDM_IDS(info)
-
-#define INTEL_BDW_D_IDS(info) \
-	INTEL_BDW_GT12D_IDS(info), \
-	INTEL_BDW_GT3D_IDS(info), \
-	INTEL_BDW_RSVDD_IDS(info)
+#define INTEL_BDW_IDS(info) \
+	INTEL_BDW_GT12_IDS(info), \
+	INTEL_BDW_GT3_IDS(info), \
+	INTEL_BDW_RSVD_IDS(info)
 
 #define INTEL_CHV_IDS(info) \
 	INTEL_VGA_DEVICE(0x22b0, info), \
@@ -280,7 +265,8 @@
 	INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
 	INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
 	INTEL_VGA_DEVICE(0x1927, info), /* ULT GT3 */ \
-	INTEL_VGA_DEVICE(0x192B, info)  /* Halo GT3 */ \
+	INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
+	INTEL_VGA_DEVICE(0x192D, info)  /* SRV GT3 */
 
 #define INTEL_SKL_GT4_IDS(info) \
 	INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \
@@ -302,6 +288,10 @@
 	INTEL_VGA_DEVICE(0x5A84, info), /* APL HD Graphics 505 */ \
 	INTEL_VGA_DEVICE(0x5A85, info)  /* APL HD Graphics 500 */
 
+#define INTEL_GLK_IDS(info) \
+	INTEL_VGA_DEVICE(0x3184, info), \
+	INTEL_VGA_DEVICE(0x3185, info)
+
 #define INTEL_KBL_GT1_IDS(info)	\
 	INTEL_VGA_DEVICE(0x5913, info), /* ULT GT1.5 */ \
 	INTEL_VGA_DEVICE(0x5915, info), /* ULX GT1.5 */ \
@@ -336,8 +326,4 @@
 	INTEL_KBL_GT3_IDS(info), \
 	INTEL_KBL_GT4_IDS(info)
 
-#define INTEL_GLK_IDS(info) \
-	INTEL_VGA_DEVICE(0x3184, info), \
-	INTEL_VGA_DEVICE(0x3185, info)
-
 #endif /* _I915_PCIIDS_H */
diff --git a/src/intel_module.c b/src/intel_module.c
index 6b04857..2e97b5e 100644
--- a/src/intel_module.c
+++ b/src/intel_module.c
@@ -349,23 +349,13 @@ static const struct pci_id_match intel_device_match[] = {
 	INTEL_IVB_D_IDS(&intel_ivybridge_info),
 	INTEL_IVB_M_IDS(&intel_ivybridge_info),
 
-	INTEL_HSW_D_IDS(&intel_haswell_info),
-	INTEL_HSW_M_IDS(&intel_haswell_info),
-
-	INTEL_VLV_D_IDS(&intel_valleyview_info),
-	INTEL_VLV_M_IDS(&intel_valleyview_info),
-
-	INTEL_BDW_D_IDS(&intel_broadwell_info),
-	INTEL_BDW_M_IDS(&intel_broadwell_info),
-
+	INTEL_HSW_IDS(&intel_haswell_info),
+	INTEL_VLV_IDS(&intel_valleyview_info),
+	INTEL_BDW_IDS(&intel_broadwell_info),
 	INTEL_CHV_IDS(&intel_cherryview_info),
-
 	INTEL_SKL_IDS(&intel_skylake_info),
-
 	INTEL_BXT_IDS(&intel_broxton_info),
-
 	INTEL_KBL_IDS(&intel_kabylake_info),
-
 	INTEL_GLK_IDS(&intel_geminilake_info),
 
 	INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
diff --git a/test/dri3-test.c b/test/dri3-test.c
index 7e98f95..78e105a 100644
--- a/test/dri3-test.c
+++ b/test/dri3-test.c
@@ -93,14 +93,9 @@ static const struct pci_id_match ids[] = {
 	INTEL_IVB_D_IDS(070),
 	INTEL_IVB_M_IDS(070),
 
-	INTEL_HSW_D_IDS(075),
-	INTEL_HSW_M_IDS(075),
-
-	INTEL_VLV_D_IDS(071),
-	INTEL_VLV_M_IDS(071),
-
-	INTEL_BDW_D_IDS(0100),
-	INTEL_BDW_M_IDS(0100),
+	INTEL_HSW_IDS(075),
+	INTEL_VLV_IDS(071),
+	INTEL_BDW_IDS(0100),
 };
 
 static int i915_gen(int device)
commit 880917deeefef068b6d6c01e04c1d9bfa64ae2db
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Tue Oct 25 16:21:03 2016 +0100

    sna: Check link-status after a hotplug event
    
    If the modeset fails, or the link subsequently fails, we need to perform
    the modeset again. To signal this the kernel sends us a hotplug uevent
    with a new link-status property set to bad. The kernel may have to take
    some corrective action which invalidates the current mode and so the
    following modeset may fail and we need to go and report to the client
    for them to choose the next course of action (reconfigure the displays).
    At the very least the kernel *requires* us to reapply the current mode.
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/sna_display.c b/src/sna/sna_display.c
index 73a7069..573869e 100644
--- a/src/sna/sna_display.c
+++ b/src/sna/sna_display.c
@@ -257,6 +257,8 @@ struct sna_output {
 	int connector_type;
 	int connector_type_id;
 
+	uint32_t link_status_idx;
+
 	uint32_t edid_idx;
 	uint32_t edid_blob_id;
 	uint32_t edid_len;
@@ -311,6 +313,8 @@ enum { /* XXX copied from hw/xfree86/modes/xf86Crtc.c */
 
 static void __sna_output_dpms(xf86OutputPtr output, int dpms, int fixup);
 static void sna_crtc_disable_cursor(struct sna *sna, struct sna_crtc *crtc);
+static bool sna_crtc_flip(struct sna *sna, struct sna_crtc *crtc,
+			  struct kgem_bo *bo, int x, int y);
 
 static bool is_zaphod(ScrnInfoPtr scrn)
 {
@@ -5140,6 +5144,8 @@ reset:
 	sna_output->id = compat_conn.conn.connector_id;
 	sna_output->is_panel = is_panel(compat_conn.conn.connector_type);
 	sna_output->edid_idx = find_property(sna, sna_output, "EDID");
+	sna_output->link_status_idx =
+		find_property(sna, sna_output, "link-status");
 	if (find_property(sna, sna_output, "scaling mode") != -1)
 		sna_output->add_default_modes =
 			xf86ReturnOptValBool(output->options, OPTION_DEFAULT_MODES, TRUE);
@@ -5303,6 +5309,45 @@ bool sna_mode_find_hotplug_connector(struct sna *sna, unsigned id)
 }
 
 static bool
+output_retrain_link(struct sna *sna, struct sna_output *output)
+{
+	struct sna_crtc *crtc = to_sna_crtc(output->base->crtc);
+	int crtc_x = crtc->offset & 0xffff;
+	int crtc_y = crtc->offset >> 16;
+
+	return sna_crtc_flip(sna, crtc, crtc->bo, crtc_x, crtc_y);
+}
+
+static bool
+output_check_link(struct sna *sna, struct sna_output *output)
+{
+	uint64_t link_status;
+
+	if (!output->base->crtc)
+		return true;
+
+	if (output->link_status_idx == -1)
+		return true;
+
+#define LINK_STATUS_GOOD 0
+	link_status = output->prop_values[output->link_status_idx];
+	DBG(("%s: link_status=%d\n", __FUNCTION__, link_status));
+	if (link_status == LINK_STATUS_GOOD)
+		return true;
+
+	/* Perform a modeset as required for "link-status" = BAD */
+	if (!output_retrain_link(sna, output))
+		return false;
+
+	/* Query the "link-status" again to confirm the modeset */
+	update_properties(sna, output);
+
+	link_status = output->prop_values[output->link_status_idx];
+	DBG(("%s: link_status=%d after modeset\n", __FUNCTION__, link_status));
+	return link_status == LINK_STATUS_GOOD;
+}
+
+static bool
 output_check_status(struct sna *sna, struct sna_output *output)
 {
 	union compat_mode_get_connector compat_conn;
@@ -5311,9 +5356,6 @@ output_check_status(struct sna *sna, struct sna_output *output)
 	xf86OutputStatus status;
 	char *edid;
 
-	if (output->reprobe)
-		return false;
-
 	VG_CLEAR(compat_conn);
 
 	compat_conn.conn.connection = -1;
@@ -5330,6 +5372,12 @@ output_check_status(struct sna *sna, struct sna_output *output)
 		     &compat_conn.conn) == 0)
 		output->update_properties = false;
 
+	if (!output_check_link(sna, output))
+		return false;
+
+	if (output->reprobe)
+		return false;
+
 	switch (compat_conn.conn.connection) {
 	case DRM_MODE_CONNECTED:
 		status = XF86OutputStatusConnected;


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