xf86-video-intel: src/sna/sna_dri3.c

[Chris Wilson]

 src/sna/sna_dri3.c |    2 ++
 1 file changed, 2 insertions(+)

New commits:
commit 71d32739db7c5dd93d71bad9c4de049f82524ceb
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Tue Aug 23 09:03:27 2016 +0100

    sna/dri3: Flush the DRI3 pixmap bo before reporting the fd to the client
    
    When the client first receives the fd to the pixmap, the presumption is
    that it is coherent. (Give or take concurrent rendering to the pixmap
    which will be reported in later Damage events.) We queue all damage to
    the GPU, but we also need to remember to finally flush the command queue
    so that the rendering is ordered implicitly with the client.
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/sna_dri3.c b/src/sna/sna_dri3.c
index a10c7fb..ce4970a 100644
--- a/src/sna/sna_dri3.c
+++ b/src/sna/sna_dri3.c
@@ -60,6 +60,8 @@ static inline void mark_dri3_pixmap(struct sna *sna, struct sna_pixmap *priv, st
 		priv->shm = true;
 
 	sna_watch_flush(sna, 1);
+
+	kgem_bo_submit(&sna->kgem, bo);
 	kgem_bo_unclean(&sna->kgem, bo);
 }