xf86-video-intel: 2 commits - src/uxa/intel_present.c test/present-test.c

[Chris Wilson]

 src/uxa/intel_present.c |    6 +++---
 test/present-test.c     |    6 ++++--
 2 files changed, 7 insertions(+), 5 deletions(-)

New commits:
commit 4c9af314774d366583411f44b0c9b7dd1a1198f2
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Fri Feb 6 08:05:15 2015 +0000

    uxa/present: Do flip returns 0 on failure
    
    Oops, inverted error handling lead to use-after-free and calamity.
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/uxa/intel_present.c b/src/uxa/intel_present.c
index 2e57e7a..a7f904c 100644
--- a/src/uxa/intel_present.c
+++ b/src/uxa/intel_present.c
@@ -360,9 +360,9 @@ intel_present_unflip(ScreenPtr screen, uint64_t event_id)
 
 	event->event_id = event_id;
 
-	if (intel_do_pageflip(intel, bo, -1, FALSE, event,
-			      intel_present_flip_event,
-			      intel_present_flip_abort))
+	if (!intel_do_pageflip(intel, bo, -1, FALSE, event,
+			       intel_present_flip_event,
+			       intel_present_flip_abort))
 		goto fail;
 
 	return;
commit ee42e106fed8e04c61fed84cd1f75cd757afb093
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Thu Feb 5 13:33:54 2015 +0000

    test: Tighten present checks to catch CRTC interchange bug in a single pass
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/test/present-test.c b/test/present-test.c
index 6b562eb..dc399c3 100644
--- a/test/present-test.c
+++ b/test/present-test.c
@@ -410,15 +410,17 @@ static int test_crtc(Display *dpy, void *queue, uint64_t last_msc)
 
 	printf("Testing each crtc, without waiting for each flip\n");
 	test.flags = 0;
+	test.msc = check_msc(dpy, test.win, test.queue, test.msc);
 	err += for_each_crtc(dpy, __test_crtc, &test);
+	test.msc = check_msc(dpy, test.win, test.queue, test.msc);
 
 	printf("Testing each crtc, waiting for flips to complete\n");
 	test.flags = SYNC;
+	test.msc = check_msc(dpy, test.win, test.queue, test.msc);
 	err += for_each_crtc(dpy, __test_crtc, &test);
-
 	test.msc = check_msc(dpy, test.win, test.queue, test.msc);
-	dri3_fence_free(dpy, &test.fence);
 
+	dri3_fence_free(dpy, &test.fence);
 	XSync(dpy, True);
 	err += !!_x_error_occurred;