xf86-video-intel: 6 commits - src/i915_pciids.h src/intel_module.c src/sna/gen3_render.c src/sna/gen4_render.c src/sna/gen5_render.c src/sna/gen6_render.c src/sna/gen7_render.c src/sna/gen8_render.c src/sna/kgem.c src/sna/sna_accel.c src/sna/sna_display.c src/sna/sna_dri2.c src/sna/sna_video_textured.c tools/virtual.c
Chris Wilson
ickle at kemper.freedesktop.org
Fri May 16 02:21:17 PDT 2014
src/i915_pciids.h | 32 +++++++++++++++++++++------
src/intel_module.c | 6 +++++
src/sna/gen3_render.c | 3 --
src/sna/gen4_render.c | 7 +-----
src/sna/gen5_render.c | 7 +-----
src/sna/gen6_render.c | 7 +-----
src/sna/gen7_render.c | 7 +-----
src/sna/gen8_render.c | 7 +-----
src/sna/kgem.c | 21 +++++++++---------
src/sna/sna_accel.c | 7 +++---
src/sna/sna_display.c | 50 ++-----------------------------------------
src/sna/sna_dri2.c | 26 ++++++++++++----------
src/sna/sna_video_textured.c | 17 +++++++++-----
tools/virtual.c | 2 -
14 files changed, 86 insertions(+), 113 deletions(-)
New commits:
commit 89e8f2b35bbbcaac23dd1d3fc42e83d8214a9130
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Fri May 16 10:14:57 2014 +0100
sna/dri2: Update the swap type for chained flips
We stash the pending flip mode into the closure, but failed to copy that
over to the right field when continuing with a chain of flips. The
impact was that we would fail to issue the required SwapComplete to
unblock the clients.
Fixes regression from
commit 96ce362ba40bf9560fb1aa27a6ae5fdd2a8bd428
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Tue May 13 09:46:45 2014 +0100
sna/dri2: Do not rate-limit vblank=0 swaps
Reported-by: francisbrwn
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_dri2.c b/src/sna/sna_dri2.c
index 6c7f84a..68299b7 100644
--- a/src/sna/sna_dri2.c
+++ b/src/sna/sna_dri2.c
@@ -1303,8 +1303,8 @@ static void fake_swap_complete(struct sna *sna,
ClientPtr client, DrawablePtr draw, int type,
DRI2SwapEventPtr func, void *data)
{
- DBG(("%s: frame=%d, tv=%d.%06d\n", __FUNCTION__,
- sna->dri2.last_swap[0].msc,
+ DBG(("%s: frame=%lld, tv=%d.%06d\n", __FUNCTION__,
+ (long long)sna->dri2.last_swap[0].msc,
sna->dri2.last_swap[0].tv_sec,
sna->dri2.last_swap[0].tv_usec));
DRI2SwapComplete(client, draw,
@@ -1657,6 +1657,8 @@ sna_dri2_flip_continue(struct sna *sna, struct sna_dri2_frame_event *info)
DBG(("%s(mode=%d)\n", __FUNCTION__, info->mode));
if (info->mode > 0){
+ info->type = info->mode;
+
if (get_private(info->front)->bo != sna_pixmap(sna->front)->gpu_bo)
return false;
@@ -1672,9 +1674,9 @@ sna_dri2_flip_continue(struct sna *sna, struct sna_dri2_frame_event *info)
info->scanout[0].name = info->front->name;
assert(info->scanout[0].bo->scanout);
sna->dri2.flip_pending = info;
-
- info->type = info->mode;
} else {
+ info->type = -info->mode;
+
if (!info->draw)
return false;
@@ -1904,11 +1906,11 @@ get_current_msc(struct sna *sna, int pipe)
vbl.request.type = DRM_VBLANK_RELATIVE | pipe_select(pipe);
vbl.request.sequence = 0;
if (sna_wait_vblank(sna, &vbl, pipe) == 0) {
- DBG(("%s: recording last swap on pipe=%d, frame %d, time %d.%06d\n",
+ DBG(("%s: recording last swap on pipe=%d, frame %lld, time %ld.%06ld\n",
__FUNCTION__, pipe,
- vbl.reply.sequence,
- vbl.reply.tval_sec,
- vbl.reply.tval_usec));
+ (long long)vbl.reply.sequence,
+ (long)vbl.reply.tval_sec,
+ (long)vbl.reply.tval_usec));
sna->dri2.last_swap[pipe].tv_sec = vbl.reply.tval_sec;
sna->dri2.last_swap[pipe].tv_usec = vbl.reply.tval_usec;
sna->dri2.last_swap[pipe].msc = vbl.reply.sequence;
@@ -2398,11 +2400,11 @@ fail:
vbl.request.type = DRM_VBLANK_RELATIVE;
vbl.request.sequence = 0;
if (sna_wait_vblank(sna, &vbl, pipe) == 0) {
- DBG(("%s: recording last swap on pipe=%d, frame %d, time %d.%06d\n",
+ DBG(("%s: recording last swap on pipe=%d, frame %lld, time %ld.%06ld\n",
__FUNCTION__, pipe,
- vbl.reply.sequence,
- vbl.reply.tval_sec,
- vbl.reply.tval_usec));
+ (long long)vbl.reply.sequence,
+ (long)vbl.reply.tval_sec,
+ (long)vbl.reply.tval_usec));
sna->dri2.last_swap[pipe].tv_sec = vbl.reply.tval_sec;
sna->dri2.last_swap[pipe].tv_usec = vbl.reply.tval_usec;
sna->dri2.last_swap[pipe].msc = vbl.reply.sequence;
commit e73d51247be5018fe53346f991e2f178c917cb13
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Thu May 15 23:00:53 2014 +0100
sna/video: Only migrate the destination window
By using move-area-to-gpu and specifying that we overwrite the target
area, we can optimize away any needless damage migration.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/gen3_render.c b/src/sna/gen3_render.c
index 6ba1bb4..fffdb5a 100644
--- a/src/sna/gen3_render.c
+++ b/src/sna/gen3_render.c
@@ -5398,9 +5398,8 @@ gen3_render_video(struct sna *sna,
DBG(("%s: src:%dx%d (frame:%dx%d) -> dst:%dx%d\n", __FUNCTION__,
src_width, src_height, frame->width, frame->height, dst_width, dst_height));
+ assert(priv->gpu_bo);
dst_bo = priv->gpu_bo;
- if (dst_bo == NULL)
- return false;
bilinear = src_width != dst_width || src_height != dst_height;
diff --git a/src/sna/gen4_render.c b/src/sna/gen4_render.c
index f74757b..3015c2c 100644
--- a/src/sna/gen4_render.c
+++ b/src/sna/gen4_render.c
@@ -1398,6 +1398,7 @@ gen4_render_video(struct sna *sna,
PixmapPtr pixmap)
{
struct sna_composite_op tmp;
+ struct sna_pixmap *priv = sna_pixmap(pixmap);
int dst_width = dstRegion->extents.x2 - dstRegion->extents.x1;
int dst_height = dstRegion->extents.y2 - dstRegion->extents.y1;
int src_width = frame->src.x2 - frame->src.x1;
@@ -1405,16 +1406,12 @@ gen4_render_video(struct sna *sna,
float src_offset_x, src_offset_y;
float src_scale_x, src_scale_y;
int nbox, pix_xoff, pix_yoff;
- struct sna_pixmap *priv;
BoxPtr box;
DBG(("%s: %dx%d -> %dx%d\n", __FUNCTION__,
src_width, src_height, dst_width, dst_height));
- priv = sna_pixmap_force_to_gpu(pixmap, MOVE_READ | MOVE_WRITE);
- if (priv == NULL)
- return false;
-
+ assert(priv->gpu_bo);
memset(&tmp, 0, sizeof(tmp));
tmp.op = PictOpSrc;
diff --git a/src/sna/gen5_render.c b/src/sna/gen5_render.c
index 67b0527..9ad7afe 100644
--- a/src/sna/gen5_render.c
+++ b/src/sna/gen5_render.c
@@ -1348,6 +1348,7 @@ gen5_render_video(struct sna *sna,
PixmapPtr pixmap)
{
struct sna_composite_op tmp;
+ struct sna_pixmap *priv = sna_pixmap(pixmap);
int dst_width = dstRegion->extents.x2 - dstRegion->extents.x1;
int dst_height = dstRegion->extents.y2 - dstRegion->extents.y1;
int src_width = frame->src.x2 - frame->src.x1;
@@ -1355,16 +1356,12 @@ gen5_render_video(struct sna *sna,
float src_offset_x, src_offset_y;
float src_scale_x, src_scale_y;
int nbox, pix_xoff, pix_yoff;
- struct sna_pixmap *priv;
BoxPtr box;
DBG(("%s: %dx%d -> %dx%d\n", __FUNCTION__,
src_width, src_height, dst_width, dst_height));
- priv = sna_pixmap_force_to_gpu(pixmap, MOVE_READ | MOVE_WRITE);
- if (priv == NULL)
- return false;
-
+ assert(priv->gpu_bo);
memset(&tmp, 0, sizeof(tmp));
tmp.op = PictOpSrc;
diff --git a/src/sna/gen6_render.c b/src/sna/gen6_render.c
index cb6f293..8e25dc4 100644
--- a/src/sna/gen6_render.c
+++ b/src/sna/gen6_render.c
@@ -1585,6 +1585,7 @@ gen6_render_video(struct sna *sna,
PixmapPtr pixmap)
{
struct sna_composite_op tmp;
+ struct sna_pixmap *priv = sna_pixmap(pixmap);
int dst_width = dstRegion->extents.x2 - dstRegion->extents.x1;
int dst_height = dstRegion->extents.y2 - dstRegion->extents.y1;
int src_width = frame->src.x2 - frame->src.x1;
@@ -1592,7 +1593,6 @@ gen6_render_video(struct sna *sna,
float src_offset_x, src_offset_y;
float src_scale_x, src_scale_y;
int nbox, pix_xoff, pix_yoff;
- struct sna_pixmap *priv;
unsigned filter;
BoxPtr box;
@@ -1605,10 +1605,7 @@ gen6_render_video(struct sna *sna,
REGION_EXTENTS(NULL, dstRegion)->x2,
REGION_EXTENTS(NULL, dstRegion)->y2));
- priv = sna_pixmap_force_to_gpu(pixmap, MOVE_READ | MOVE_WRITE);
- if (priv == NULL)
- return false;
-
+ assert(priv->gpu_bo);
memset(&tmp, 0, sizeof(tmp));
tmp.dst.pixmap = pixmap;
diff --git a/src/sna/gen7_render.c b/src/sna/gen7_render.c
index 8d32c3e..2e1682c 100644
--- a/src/sna/gen7_render.c
+++ b/src/sna/gen7_render.c
@@ -1828,6 +1828,7 @@ gen7_render_video(struct sna *sna,
PixmapPtr pixmap)
{
struct sna_composite_op tmp;
+ struct sna_pixmap *priv = sna_pixmap(pixmap);
int dst_width = dstRegion->extents.x2 - dstRegion->extents.x1;
int dst_height = dstRegion->extents.y2 - dstRegion->extents.y1;
int src_width = frame->src.x2 - frame->src.x1;
@@ -1835,7 +1836,6 @@ gen7_render_video(struct sna *sna,
float src_offset_x, src_offset_y;
float src_scale_x, src_scale_y;
int nbox, pix_xoff, pix_yoff;
- struct sna_pixmap *priv;
unsigned filter;
BoxPtr box;
@@ -1848,10 +1848,7 @@ gen7_render_video(struct sna *sna,
REGION_EXTENTS(NULL, dstRegion)->x2,
REGION_EXTENTS(NULL, dstRegion)->y2));
- priv = sna_pixmap_force_to_gpu(pixmap, MOVE_READ | MOVE_WRITE);
- if (priv == NULL)
- return false;
-
+ assert(priv->gpu_bo);
memset(&tmp, 0, sizeof(tmp));
tmp.dst.pixmap = pixmap;
diff --git a/src/sna/gen8_render.c b/src/sna/gen8_render.c
index 0b7979e..bda3700 100644
--- a/src/sna/gen8_render.c
+++ b/src/sna/gen8_render.c
@@ -3644,6 +3644,7 @@ gen8_render_video(struct sna *sna,
PixmapPtr pixmap)
{
struct sna_composite_op tmp;
+ struct sna_pixmap *priv = sna_pixmap(pixmap);
int dst_width = dstRegion->extents.x2 - dstRegion->extents.x1;
int dst_height = dstRegion->extents.y2 - dstRegion->extents.y1;
int src_width = frame->src.x2 - frame->src.x1;
@@ -3651,7 +3652,6 @@ gen8_render_video(struct sna *sna,
float src_offset_x, src_offset_y;
float src_scale_x, src_scale_y;
int nbox, pix_xoff, pix_yoff;
- struct sna_pixmap *priv;
unsigned filter;
BoxPtr box;
@@ -3664,10 +3664,7 @@ gen8_render_video(struct sna *sna,
REGION_EXTENTS(NULL, dstRegion)->x2,
REGION_EXTENTS(NULL, dstRegion)->y2));
- priv = sna_pixmap_force_to_gpu(pixmap, MOVE_READ | MOVE_WRITE);
- if (priv == NULL)
- return false;
-
+ assert(priv->gpu_bo);
memset(&tmp, 0, sizeof(tmp));
tmp.dst.pixmap = pixmap;
diff --git a/src/sna/sna_video_textured.c b/src/sna/sna_video_textured.c
index c2a37bf..335769c 100644
--- a/src/sna/sna_video_textured.c
+++ b/src/sna/sna_video_textured.c
@@ -170,6 +170,7 @@ sna_video_textured_put_image(ClientPtr client,
struct sna *sna = video->sna;
struct sna_video_frame frame;
PixmapPtr pixmap = get_drawable_pixmap(draw);
+ unsigned int flags;
BoxRec dstBox;
RegionRec clip;
xf86CrtcPtr crtc;
@@ -197,12 +198,6 @@ sna_video_textured_put_image(ClientPtr client,
clip.extents.x1, clip.extents.y1,
clip.extents.x2, clip.extents.y2));
- if (!sna_pixmap_move_to_gpu(pixmap, MOVE_READ | MOVE_WRITE)) {
- DBG(("%s: attempting to render to a non-GPU pixmap\n",
- __FUNCTION__));
- return BadAlloc;
- }
-
sna_video_frame_init(video, format->id, width, height, &frame);
if (!sna_video_clip_helper(video, &frame, &crtc, &dstBox,
@@ -211,6 +206,16 @@ sna_video_textured_put_image(ClientPtr client,
&clip))
return Success;
+ flags = MOVE_WRITE | __MOVE_FORCE;
+ if (clip.data)
+ flags |= MOVE_READ;
+
+ if (!sna_pixmap_move_area_to_gpu(pixmap, &clip.extents, flags)) {
+ DBG(("%s: attempting to render to a non-GPU pixmap\n",
+ __FUNCTION__));
+ return BadAlloc;
+ }
+
sna_video_frame_set_rotation(video, &frame, RR_Rotate_0);
if (xvmc_passthrough(format->id)) {
commit 10c18b1a4631ebab5508f4308c73129f2111e964
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Thu May 15 21:50:41 2014 +0100
intel-virtual-output: Mark the source SHMPixmap as writeable
This is fortunately a no-op, as it gets initialized to zero already
(that is the pixmap is writeable). However, we may as well do the right
thing...
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/tools/virtual.c b/tools/virtual.c
index d792957..d107617 100644
--- a/tools/virtual.c
+++ b/tools/virtual.c
@@ -967,7 +967,7 @@ static int clone_init_xfer(struct clone *clone)
if (clone->src.use_shm) {
clone->src.shm = clone->shm;
- clone->dst.shm.readOnly = False;
+ clone->src.shm.readOnly = False;
XShmAttach(clone->src.dpy, &clone->src.shm);
XSync(clone->src.dpy, False);
}
commit b21fc65b23fcbb2b9a04eb92e3719d88e2d026dc
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Thu May 15 11:23:16 2014 +0100
intel: Update PCI IDs for Cherryview
Copied from kernel commit 7d87a7f709650bde4d7d63117f25ee1c095da5dd
Author: Ville Syrjälä <ville.syrjala at linux.intel.com>
Date: Wed Apr 9 18:19:04 2014 +0300
srm/i915/chv: Add Cherryview PCI IDs
and also includes non-functional changes from
commit fd3c269f8ff940cc0fbb3b7f7e84c0572f6f759a
Author: Zhao Yakui <yakui.zhao at intel.com>
Date: Thu Apr 17 10:37:35 2014 +0800
drm/i915: Split the BDW device definition to prepare for dual BSD rings on BDW GT3
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/i915_pciids.h b/src/i915_pciids.h
index 940ece4..0572035 100644
--- a/src/i915_pciids.h
+++ b/src/i915_pciids.h
@@ -191,8 +191,8 @@
INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \
INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \
INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
- INTEL_VGA_DEVICE(0x0A0E, info), /* ULT GT1 reserved */ \
- INTEL_VGA_DEVICE(0x0A1E, info), /* ULT GT2 reserved */ \
+ INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \
+ INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \
INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \
INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \
INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \
@@ -223,14 +223,32 @@
_INTEL_BDW_D(gt, 0x160A, info), /* Server */ \
_INTEL_BDW_D(gt, 0x160D, info) /* Workstation */
-#define INTEL_BDW_M_IDS(info) \
+#define INTEL_BDW_GT12M_IDS(info) \
_INTEL_BDW_M_IDS(1, info), \
- _INTEL_BDW_M_IDS(2, info), \
- _INTEL_BDW_M_IDS(3, info)
+ _INTEL_BDW_M_IDS(2, info)
-#define INTEL_BDW_D_IDS(info) \
+#define INTEL_BDW_GT12D_IDS(info) \
_INTEL_BDW_D_IDS(1, info), \
- _INTEL_BDW_D_IDS(2, info), \
+ _INTEL_BDW_D_IDS(2, info)
+
+#define INTEL_BDW_GT3M_IDS(info) \
+ _INTEL_BDW_M_IDS(3, info)
+
+#define INTEL_BDW_GT3D_IDS(info) \
_INTEL_BDW_D_IDS(3, info)
+#define INTEL_BDW_M_IDS(info) \
+ INTEL_BDW_GT12M_IDS(info), \
+ INTEL_BDW_GT3M_IDS(info)
+
+#define INTEL_BDW_D_IDS(info) \
+ INTEL_BDW_GT12D_IDS(info), \
+ INTEL_BDW_GT3D_IDS(info)
+
+#define INTEL_CHV_IDS(info) \
+ INTEL_VGA_DEVICE(0x22b0, info), \
+ INTEL_VGA_DEVICE(0x22b1, info), \
+ INTEL_VGA_DEVICE(0x22b2, info), \
+ INTEL_VGA_DEVICE(0x22b3, info)
+
#endif /* _I915_PCIIDS_H */
diff --git a/src/intel_module.c b/src/intel_module.c
index 7f31a94..223ea81 100644
--- a/src/intel_module.c
+++ b/src/intel_module.c
@@ -114,6 +114,10 @@ static const struct intel_device_info intel_broadwell_info = {
.gen = 0100,
};
+static const struct intel_device_info intel_cherryview_info = {
+ .gen = 0101,
+};
+
static const SymTabRec intel_chipsets[] = {
{PCI_CHIP_I810, "i810"},
{PCI_CHIP_I810_DC100, "i810-dc100"},
@@ -269,6 +273,8 @@ static const struct pci_id_match intel_device_match[] = {
INTEL_BDW_D_IDS(&intel_broadwell_info),
INTEL_BDW_M_IDS(&intel_broadwell_info),
+ INTEL_CHV_IDS(&intel_cherryview_info),
+
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
#endif
commit 2afeef0c3ffeae768198fc08c9f365ccd28b7f5d
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Thu May 15 11:28:48 2014 +0100
sna: Mark the CHV vsync method as unknown
Similar to the story with Baytrail, vsync is a lost art.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_display.c b/src/sna/sna_display.c
index 20b2f8e..560eb00 100644
--- a/src/sna/sna_display.c
+++ b/src/sna/sna_display.c
@@ -4766,52 +4766,6 @@ static bool sna_emit_wait_for_scanline_hsw(struct sna *sna,
return true;
}
-static bool sna_emit_wait_for_scanline_vlv(struct sna *sna,
- xf86CrtcPtr crtc,
- int pipe, int y1, int y2,
- bool full_height)
-{
- uint32_t display_base = 0x180000;
- uint32_t event;
- uint32_t *b;
-
- return false; /* synchronisation? I've heard of that */
-
- if (!sna->kgem.has_secure_batches)
- return false;
-
- assert(y1 >= 0);
- assert(y2 > y1);
- assert(sna->kgem.mode);
-
- /* Always program one less than the desired value */
- if (--y1 < 0)
- y1 = crtc->bounds.y2;
- y2--;
-
- b = kgem_get_batch(&sna->kgem);
- sna->kgem.nbatch += 4;
-
- if (pipe == 0) {
- if (full_height)
- event = MI_WAIT_FOR_PIPEA_SVBLANK;
- else
- event = MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW;
- } else {
- if (full_height)
- event = MI_WAIT_FOR_PIPEB_SVBLANK;
- else
- event = MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW;
- }
- b[0] = MI_LOAD_REGISTER_IMM | 1;
- b[1] = display_base + 0x70004 + 0x1000 * pipe;
- b[2] = (1 << 31) | (y1 << 16) | y2;
- b[3] = MI_WAIT_FOR_EVENT | event;
-
- sna->kgem.batch_flags |= I915_EXEC_SECURE;
- return true;
-}
-
static bool sna_emit_wait_for_scanline_ivb(struct sna *sna,
xf86CrtcPtr crtc,
int pipe, int y1, int y2,
@@ -5029,10 +4983,12 @@ sna_wait_for_scanline(struct sna *sna,
if (sna->kgem.gen >= 0110)
ret = false;
+ else if (sna->kgem.gen == 0101)
+ ret = false; /* chv, vsync method unknown */
else if (sna->kgem.gen >= 075)
ret = sna_emit_wait_for_scanline_hsw(sna, crtc, pipe, y1, y2, full_height);
else if (sna->kgem.gen == 071)
- ret = sna_emit_wait_for_scanline_vlv(sna, crtc, pipe, y1, y2, full_height);
+ ret = false; /* vlv, vsync method unknown */
else if (sna->kgem.gen >= 070)
ret = sna_emit_wait_for_scanline_ivb(sna, crtc, pipe, y1, y2, full_height);
else if (sna->kgem.gen >= 060)
commit d33e77d58a6f6f23e87943530197f8dc2b076981
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Fri May 16 09:59:25 2014 +0100
sna: Handle driver failures more gracefully
Avoid busy-spinning waiting for the cache to expire after a failure. Try
to free up any overdue expiration, then if we still fail, we free the
entire cache. Currently, it would spin over the expiration until all
items were overdue and then freed.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index 336cb9a..a042ca6 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -244,7 +244,7 @@ static void assert_tiling(struct kgem *kgem, struct kgem_bo *bo)
VG_CLEAR(tiling);
tiling.handle = bo->handle;
- tiling.tiling_mode = -1;
+ tiling.tiling_mode = bo->tiling;
(void)do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_GET_TILING, &tiling);
assert(tiling.tiling_mode == bo->tiling);
}
@@ -3038,6 +3038,7 @@ retry:
if (ret == 0)
return 0;
+ DBG(("%s: failed ret=%d, throttling and discarding cache\n", __FUNCTION__, ret));
(void)__kgem_throttle_retire(kgem, 0);
if (kgem_expire_cache(kgem))
goto retry;
@@ -3394,9 +3395,11 @@ bool kgem_expire_cache(struct kgem *kgem)
if (kgem->need_purge)
kgem_purge_cache(kgem);
- expire = 0;
+ if (kgem->need_retire)
+ kgem_retire(kgem);
- idle = !kgem->need_retire;
+ expire = 0;
+ idle = true;
for (i = 0; i < ARRAY_SIZE(kgem->inactive); i++) {
idle &= list_is_empty(&kgem->inactive[i]);
list_for_each_entry(bo, &kgem->inactive[i], list) {
@@ -3408,15 +3411,13 @@ bool kgem_expire_cache(struct kgem *kgem)
bo->delta = now;
}
}
- if (idle) {
- DBG(("%s: idle\n", __FUNCTION__));
- kgem->need_expire = false;
+ if (expire == 0) {
+ DBG(("%s: idle? %d\n", __FUNCTION__, idle));
+ kgem->need_expire = !idle;
return false;
}
- if (expire == 0)
- return true;
- idle = !kgem->need_retire;
+ idle = true;
for (i = 0; i < ARRAY_SIZE(kgem->inactive); i++) {
struct list preserve;
@@ -3465,7 +3466,7 @@ bool kgem_expire_cache(struct kgem *kgem)
__FUNCTION__, count, size, idle));
kgem->need_expire = !idle;
- return !idle;
+ return count;
(void)count;
(void)size;
}
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index b3900f4..7aa2627 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -16856,10 +16856,11 @@ static void sna_accel_expire(struct sna *sna)
{
DBG(("%s (time=%ld)\n", __FUNCTION__, (long)TIME));
- if (!kgem_expire_cache(&sna->kgem))
- sna_accel_disarm_timer(sna, EXPIRE_TIMER);
-
+ kgem_expire_cache(&sna->kgem);
sna_pixmap_expire(sna);
+
+ if (!sna->kgem.need_expire)
+ sna_accel_disarm_timer(sna, EXPIRE_TIMER);
}
#ifdef DEBUG_MEMORY
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