xf86-video-intel: src/sna/gen5_render.c

Chris Wilson ickle at kemper.freedesktop.org
Wed Feb 12 21:25:38 CET 2014


 src/sna/gen5_render.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

New commits:
commit fb89bfc73f4103ca6116c8f91970f4bfa491636c
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Wed Feb 12 16:41:51 2014 +0000

    sna/gen5: Flush the render cache between operations
    
    When we change the blend mode between operations, it appears that we
    must flush the render cache or else we risk render corruption. This is
    usually noticeable in rendering of single glyphs.
    
    This was originally fixed for bug 51422, but was reintroduced by
    commit 37eb7343be1aeeb90a860096756603a577df1a77
    Author: Chris Wilson <chris at chris-wilson.co.uk>
    Date:   Sat Dec 1 09:40:11 2012 +0000
    
        sna/gen5: Inspired by gen4, reorder the flushing
    and the desire to reduce the impact of this w/a.
    
    Reported-by: itumaykin at gmail.com
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74882
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/gen5_render.c b/src/sna/gen5_render.c
index c5ccaac..d5856ea 100644
--- a/src/sna/gen5_render.c
+++ b/src/sna/gen5_render.c
@@ -1017,7 +1017,7 @@ gen5_emit_vertex_elements(struct sna *sna,
 inline static void
 gen5_emit_pipe_flush(struct sna *sna)
 {
-#if 0
+#if 1
 	OUT_BATCH(GEN5_PIPE_CONTROL |
 		  GEN5_PIPE_CONTROL_WC_FLUSH |
 		  (4 - 2));


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