xf86-video-intel: 4 commits - src/sna/gen5_render.c src/sna/sna_display.c

[Chris Wilson]

 src/sna/gen5_render.c |    4 ++--
 src/sna/sna_display.c |   32 ++++++++++++++++++++++++--------
 2 files changed, 26 insertions(+), 10 deletions(-)

New commits:
commit fb69bd16a30cd0449fa9bb603dacd001e777b5bb
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Wed Feb 12 10:34:34 2014 +0000

    sna/gen5: Use the DBG option ALWAYS_FLUSH to force a full flush
    
    When flushing between operations, we can choose between doing a full
    flush to memory, or just a pipeline flush. For debugging it is better to
    do the full flush to rule out cache effects.
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/gen5_render.c b/src/sna/gen5_render.c
index a9db697..a89d31a 100644
--- a/src/sna/gen5_render.c
+++ b/src/sna/gen5_render.c
@@ -1049,7 +1049,7 @@ gen5_emit_state(struct sna *sna,
 	}
 	gen5_emit_vertex_elements(sna, op);
 
-	if (kgem_bo_is_dirty(op->src.bo) || kgem_bo_is_dirty(op->mask.bo)) {
+	if (ALWAYS_FLUSH || kgem_bo_is_dirty(op->src.bo) || kgem_bo_is_dirty(op->mask.bo)) {
 		DBG(("%s: flushing dirty (%d, %d)\n", __FUNCTION__,
 		     kgem_bo_is_dirty(op->src.bo),
 		     kgem_bo_is_dirty(op->mask.bo)));
@@ -1058,7 +1058,7 @@ gen5_emit_state(struct sna *sna,
 		kgem_bo_mark_dirty(op->dst.bo);
 		flush = false;
 	}
-	if (flush || ALWAYS_FLUSH) {
+	if (flush) {
 		DBG(("%s: forcing flush\n", __FUNCTION__));
 		gen5_emit_pipe_flush(sna);
 	}
commit 77f8d9ca84342b256de1e118edfd14ddae4d593f
Merge: 3fb39d4 27663f3
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Wed Feb 12 10:32:50 2014 +0000

    Merge branch 'master' of hsw:/usr/src/xf86-video-intel

commit 3fb39d477909a433ae67bdfc69ad870ddabee3a7
Merge: 2a5ad9c c02067d
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Tue Feb 11 21:57:23 2014 +0000

    Merge branch 'master' of hsw:/usr/src/xf86-video-intel

commit 2a5ad9c015bbb41550536dd3cf4ad18b7f21fd80
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Tue Feb 11 11:23:37 2014 +0000

    sna/gen6: Serialise write to DERRMR register using STORE_REGISTER_MEM
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/sna_display.c b/src/sna/sna_display.c
index a6e6f68..99afbd1 100644
--- a/src/sna/sna_display.c
+++ b/src/sna/sna_display.c
@@ -3780,6 +3780,7 @@ sna_covering_crtc(struct sna *sna, const BoxRec *box, xf86CrtcPtr desired)
 }
 
 #define MI_LOAD_REGISTER_IMM			(0x22<<23)
+#define MI_STORE_REGISTER_MEM			(0x24<<23 | 1<<22)
 
 static bool sna_emit_wait_for_scanline_hsw(struct sna *sna,
 					   xf86CrtcPtr crtc,
@@ -3965,6 +3966,7 @@ static bool sna_emit_wait_for_scanline_gen6(struct sna *sna,
 	assert(y1 >= 0);
 	assert(y2 > y1);
 	assert(sna->kgem.mode == KGEM_RENDER);
+	assert(pipe == 0 || pipe == 1);
 
 	/* Always program one less than the desired value */
 	if (--y1 < 0)
@@ -3980,18 +3982,32 @@ static bool sna_emit_wait_for_scanline_gen6(struct sna *sna,
 	event = 1 << (3*full_height + pipe*8);
 
 	b = kgem_get_batch(&sna->kgem);
-	sna->kgem.nbatch += 10;
+
+	/* Both the LRI and WAIT_FOR_EVENT must be in the same cacheline */
+	if (((sna->kgem.nbatch + 6) >> 4) != (sna->kgem.nbatch + 9) >> 4) {
+		int dw = sna->kgem.nbatch + 6;
+		dw = ALIGN(dw, 16) - dw;
+		while (dw--)
+			*b++ = MI_NOOP;
+	}
 
 	b[0] = MI_LOAD_REGISTER_IMM | 1;
 	b[1] = 0x44050; /* DERRMR */
 	b[2] = ~event;
-	b[3] = MI_LOAD_REGISTER_IMM | 1;
-	b[4] = 0x4f100; /* magic */
-	b[5] = (1 << 31) | (1 << 30) | pipe << 29 | (y1 << 16) | y2;
-	b[6] = MI_WAIT_FOR_EVENT | event;
-	b[7] = MI_LOAD_REGISTER_IMM | 1;
-	b[8] = 0x44050; /* DERRMR */
-	b[9] = ~0;
+	b[3] = MI_STORE_REGISTER_MEM | 1;
+	b[4] = 0x44050; /* DERRMR */
+	b[5] = kgem_add_reloc(&sna->kgem,
+			      &b[5] - sna->kgem.batch, NULL,
+			      I915_GEM_DOMAIN_INSTRUCTION << 16, 0);
+	b[6] = MI_LOAD_REGISTER_IMM | 1;
+	b[7] = 0x4f100; /* magic */
+	b[8] = (1 << 31) | (1 << 30) | pipe << 29 | (y1 << 16) | y2;
+	b[9] = MI_WAIT_FOR_EVENT | event;
+	b[10] = MI_LOAD_REGISTER_IMM | 1;
+	b[11] = 0x44050; /* DERRMR */
+	b[12] = ~0;
+
+	sna->kgem.nbatch = b - sna->kgem.batch + 13;
 
 	sna->kgem.batch_flags |= I915_EXEC_SECURE;
 	return true;