xf86-video-ati: Branch 'master'

[Michel Dänzer]

 man/radeon.man         |    4 ++--
 src/r600_exa.c         |    3 +++
 src/radeon.h           |    1 +
 src/radeon_exa_funcs.c |    3 +++
 src/radeon_kms.c       |   36 +++++++++++++++++++++++++++++++++---
 5 files changed, 42 insertions(+), 5 deletions(-)

New commits:
commit 365e571d9de0b5979425c34210789afca4ea5f68
Author: Samuel Li <samuel.li at amd.com>
Date:   Wed Mar 20 11:59:58 2013 -0400

    radeon: use direct mapping for fast fb access.
    
    Signed-off-by: Samuel Li <samuel.li at amd.com>

diff --git a/man/radeon.man b/man/radeon.man
index e608b1e..0cbbcf8 100644
--- a/man/radeon.man
+++ b/man/radeon.man
@@ -232,7 +232,7 @@ The default value is
 for R/RV3XX, R/RV4XX, R/RV5XX, RS6XX, RS740, R/RV6XX, R/RV7XX, RS780, RS880,
 EVERGREEN, CAYMAN, and ARUBA and
 .B off
-for R/RV/RS1XX, R/RV/RS2XX, and RS3XX.
+for R/RV/RS1XX, R/RV/RS2XX, RS3XX, and RS690/RS780/RS880 when fast fb feature is enabled.
 .TP
 .BI "Option \*qColorTiling2D\*q \*q" "boolean" \*q
 The framebuffer can be addressed either in linear, 1D, or 2D tiled modes. 2D tiled mode can
@@ -280,7 +280,7 @@ we use a heuristic based on VRAM amount to determine whether to allow EXA
 to use VRAM for non-essential pixmaps.  This option allows us to override the
 heuristic.  The default is
 .B on
-with > 32MB VRAM, off with < 32MB.
+with > 32MB VRAM, off with < 32MB or when fast fb feature is enabled for RS690/RS780/RS880.
 .TP
 .BI "Option \*qSwapbuffersWait\*q \*q" boolean \*q
 This option controls the behavior of glXSwapBuffers and glXCopySubBufferMESA
diff --git a/src/r600_exa.c b/src/r600_exa.c
index 6c0a46d..fbb1383 100644
--- a/src/r600_exa.c
+++ b/src/r600_exa.c
@@ -1542,6 +1542,9 @@ R600UploadToScreenCS(PixmapPtr pDst, int x, int y, int w, int h,
 	    if (!radeon_bo_is_busy(driver_priv->bo, &dst_domain))
 		goto copy;
 	}
+	/* use cpu copy for fast fb access */
+	if (info->is_fast_fb)
+	    goto copy;
     }
 
     scratch_pitch = RADEON_ALIGN(w, drmmode_get_pitch_align(pScrn, (bpp / 8), 0));
diff --git a/src/radeon.h b/src/radeon.h
index 77fdd6e..36665b1 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -425,6 +425,7 @@ typedef struct {
     Bool	      exa_pixmaps;
     Bool              exa_force_create;
     XF86ModReqInfo    exaReq;
+    Bool              is_fast_fb; /* use direct mapping for fast fb access */
 
     unsigned int xv_max_width;
     unsigned int xv_max_height;
diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c
index 7166cd5..d9340c5 100644
--- a/src/radeon_exa_funcs.c
+++ b/src/radeon_exa_funcs.c
@@ -412,6 +412,9 @@ RADEONUploadToScreenCS(PixmapPtr pDst, int x, int y, int w, int h,
 	    if (!radeon_bo_is_busy(driver_priv->bo, &dst_domain))
 		goto copy;
 	}
+	/* use cpu copy for fast fb access */
+	if (info->is_fast_fb)
+	    goto copy;
     }
 
     size = scratch_pitch * h;
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index fcac885..9783c93 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -319,6 +319,28 @@ radeon_flush_callback(CallbackListPtr *list,
     }
 }
 
+static Bool RADEONIsFastFBWorking(ScrnInfoPtr pScrn)
+{
+    RADEONInfoPtr info = RADEONPTR(pScrn);
+    struct drm_radeon_info ginfo;
+    int r;
+    uint32_t tmp = 0;
+
+#ifndef RADEON_INFO_FASTFB_WORKING
+#define RADEON_INFO_FASTFB_WORKING 0x14
+#endif
+    memset(&ginfo, 0, sizeof(ginfo));
+    ginfo.request = RADEON_INFO_FASTFB_WORKING;
+    ginfo.value = (uintptr_t)&tmp;
+    r = drmCommandWriteRead(info->dri2.drm_fd, DRM_RADEON_INFO, &ginfo, sizeof(ginfo));
+    if (r) {
+	return FALSE;
+    }
+    if (tmp == 1)
+	return TRUE;
+    return FALSE;
+}
+
 static Bool RADEONIsFusionGARTWorking(ScrnInfoPtr pScrn)
 {
     RADEONInfoPtr info = RADEONPTR(pScrn);
@@ -464,6 +486,12 @@ static Bool RADEONPreInitAccel_KMS(ScrnInfoPtr pScrn)
 	return FALSE;
     }
 
+    /* Check whether direct mapping is used for fast fb access*/
+    if (RADEONIsFastFBWorking(pScrn)) {
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct mapping of fb aperture is enabled for fast fb access.\n");
+	info->is_fast_fb = TRUE;
+    }
+
     if (xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE) ||
 	(!RADEONIsAccelWorking(pScrn))) {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -839,7 +867,8 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags)
 	     * with proper bit, in the meantime you need to set tiling option in
 	     * xorg configuration files
 	     */
-	    info->ChipFamily <= CHIP_FAMILY_ARUBA;
+	    info->ChipFamily <= CHIP_FAMILY_ARUBA &&
+	    !info->is_fast_fb;
 
 	/* 2D color tiling */
 	if (info->ChipFamily >= CHIP_FAMILY_R600) {
@@ -935,8 +964,9 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags)
     if (!info->use_glamor) {
 	info->exa_pixmaps = xf86ReturnOptValBool(info->Options,
 						 OPTION_EXA_PIXMAPS,
-						 ((info->vram_size > (32 * 1024 * 1024) &&
-						 info->RenderAccel)));
+						 (info->vram_size > (32 * 1024 * 1024) &&
+						 info->RenderAccel &&
+                                                 !info->is_fast_fb));
 	if (info->exa_pixmaps)
 	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 		       "EXA: Driver will allow EXA pixmaps in VRAM\n");