xf86-video-intel: 2 commits - src/sna/gen4_render.c src/sna/kgem.c src/sna/sna_accel.c

Chris Wilson ickle at kemper.freedesktop.org
Sat Jul 6 14:54:26 PDT 2013


 src/sna/gen4_render.c |   35 +++++++++++++++++++++++++++++------
 src/sna/kgem.c        |    1 +
 src/sna/sna_accel.c   |   20 +++++++++++++-------
 3 files changed, 43 insertions(+), 13 deletions(-)

New commits:
commit 368c909b29758f996dbbdbec4d471df23f60bc04
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Sat Jul 6 22:27:44 2013 +0100

    sna/gen4: Restore the flush-every-vertex w/a
    
    This is an abhorrent workaround for some internal GPU brokenness. A
    slight refinement since earlier times is the recognition that 16 is a
    magic number limiting the maximum number of inflight rectangles through
    the GPU.
    
    References: https://bugs.freedesktop.org/show_bug.cgi?id=55500
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/gen4_render.c b/src/sna/gen4_render.c
index fa140cf..a5e49e5 100644
--- a/src/sna/gen4_render.c
+++ b/src/sna/gen4_render.c
@@ -51,6 +51,7 @@
  */
 #define FORCE_SPANS 0
 #define FORCE_NONRECTILINEAR_SPANS -1
+#define FORCE_FLUSH 1 /* https://bugs.freedesktop.org/show_bug.cgi?id=55500 */
 
 #define NO_COMPOSITE 0
 #define NO_COMPOSITE_SPANS 0
@@ -596,6 +597,7 @@ static bool gen4_rectangle_begin(struct sna *sna,
 	ndwords = op->need_magic_ca_pass? 20 : 6;
 	if ((sna->render.vb_id & id) == 0)
 		ndwords += 5;
+	ndwords += 2*FORCE_FLUSH;
 
 	if (!kgem_check_batch(&sna->kgem, ndwords))
 		return false;
@@ -618,7 +620,8 @@ static int gen4_get_rectangles__flush(struct sna *sna,
 			return rem;
 	}
 
-	if (!kgem_check_batch(&sna->kgem, op->need_magic_ca_pass ? 25 : 6))
+	if (!kgem_check_batch(&sna->kgem,
+			      2*FORCE_FLUSH + (op->need_magic_ca_pass ? 25 : 6)))
 		return 0;
 	if (!kgem_check_reloc_and_exec(&sna->kgem, 2))
 		return 0;
@@ -644,6 +647,22 @@ inline static int gen4_get_rectangles(struct sna *sna,
 	int rem;
 
 	assert(want);
+#if FORCE_FLUSH
+	if (sna->render.vertex_offset) {
+		rem = 16 - (sna->render.vertex_index - sna->render.vertex_start) / 3;
+		if (rem <= 0) {
+			gen4_vertex_flush(sna);
+			if (gen4_magic_ca_pass(sna, op))
+				gen4_emit_pipelined_pointers(sna, op, op->op,
+							     op->u.gen4.wm_kernel);
+			OUT_BATCH(MI_FLUSH | MI_INHIBIT_RENDER_CACHE_FLUSH);
+			rem = 16;
+		}
+	} else
+		rem = 16;
+	if (want > rem)
+		want = rem;
+#endif
 
 start:
 	rem = vertex_space(sna);
@@ -783,7 +802,7 @@ gen4_get_batch(struct sna *sna, const struct sna_composite_op *op)
 {
 	kgem_set_mode(&sna->kgem, KGEM_RENDER, op->dst.bo);
 
-	if (!kgem_check_batch_with_surfaces(&sna->kgem, 150, 4)) {
+	if (!kgem_check_batch_with_surfaces(&sna->kgem, 150 + 50*FORCE_FLUSH, 4)) {
 		DBG(("%s: flushing batch: %d < %d+%d\n",
 		     __FUNCTION__, sna->kgem.surface - sna->kgem.nbatch,
 		     150, 4*8));
@@ -1423,7 +1442,6 @@ gen4_render_video(struct sna *sna,
 			}
 			box++;
 		} while (--n);
-
 		gen4_vertex_flush(sna);
 		if (!nbox)
 			break;
@@ -1974,7 +1992,9 @@ gen4_render_composite(struct sna *sna,
 	tmp->boxes = gen4_render_composite_boxes__blt;
 	if (tmp->emit_boxes) {
 		tmp->boxes = gen4_render_composite_boxes;
+#if !FORCE_FLUSH
 		tmp->thread_boxes = gen4_render_composite_boxes__thread;
+#endif
 	}
 	tmp->done  = gen4_render_composite_done;
 
@@ -2435,7 +2455,8 @@ fallback_blt:
 		box++;
 	} while (--n);
 
-	gen4_vertex_flush(sna);
+	if (!FORCE_FLUSH || sna->render.vertex_offset)
+		gen4_vertex_flush(sna);
 	sna_render_composite_redirect_done(sna, &tmp);
 	kgem_bo_destroy(&sna->kgem, tmp.src.bo);
 	return true;
@@ -2673,7 +2694,8 @@ gen4_render_fill_boxes(struct sna *sna,
 		box++;
 	} while (--n);
 
-	gen4_vertex_flush(sna);
+	if (!FORCE_FLUSH || sna->render.vertex_offset)
+		gen4_vertex_flush(sna);
 	kgem_bo_destroy(&sna->kgem, tmp.src.bo);
 	return true;
 }
@@ -2856,7 +2878,8 @@ gen4_render_fill_one(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo,
 
 	gen4_render_fill_rectangle(sna, &tmp, x1, y1, x2 - x1, y2 - y1);
 
-	gen4_vertex_flush(sna);
+	if (!FORCE_FLUSH || sna->render.vertex_offset)
+		gen4_vertex_flush(sna);
 	kgem_bo_destroy(&sna->kgem, tmp.src.bo);
 
 	return true;
diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index 5386081..cb6276d 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -1467,6 +1467,7 @@ static void kgem_fixup_self_relocs(struct kgem *kgem, struct kgem_bo *bo)
 {
 	int n;
 
+	assert(kgem->nreloc__self <= 256);
 	if (kgem->nreloc__self == 0)
 		return;
 
commit 1fbf47ec1bed888c1b7c8dcbeb01d8e067727c82
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Sat Jul 6 18:30:47 2013 +0100

    sna: Tune inplace hints for CPU operations with GPU targets
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index da1ca40..f99df54 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -1446,10 +1446,16 @@ static inline bool pixmap_inplace(struct sna *sna,
 	if (wedged(sna) && !priv->pinned)
 		return false;
 
+	if (priv->gpu_damage &&
+	    (priv->clear || (flags & MOVE_READ) == 0) &&
+	    kgem_bo_is_busy(priv->gpu_bo))
+		return false;
+
 	if (priv->mapped)
 		return has_coherent_map(sna, priv->gpu_bo, flags);
 
-	if (flags & MOVE_READ && priv->cpu_damage)
+	if (flags & MOVE_READ &&
+	    (priv->cpu || priv->cpu_damage || priv->gpu_damage == NULL))
 		return false;
 
 	return (pixmap->devKind * pixmap->drawable.height >> 12) >
@@ -2160,14 +2166,14 @@ static inline bool region_inplace(struct sna *sna,
 	if (wedged(sna) && !priv->pinned)
 		return false;
 
-	if ((priv->cpu || flags & MOVE_READ) &&
-	    region_overlaps_damage(region, priv->cpu_damage, 0, 0)) {
-		DBG(("%s: no, uncovered CPU damage pending\n", __FUNCTION__));
+	if (priv->gpu_damage &&
+	    (priv->clear || (flags & MOVE_READ) == 0) &&
+	    kgem_bo_is_busy(priv->gpu_bo))
 		return false;
-	}
 
-	if (priv->cpu) {
-		DBG(("%s: no, preferring last action of CPU\n", __FUNCTION__));
+	if (flags & MOVE_READ &&
+	    (priv->cpu || region_overlaps_damage(region, priv->cpu_damage, 0, 0))) {
+		DBG(("%s: no, uncovered CPU damage pending\n", __FUNCTION__));
 		return false;
 	}
 


More information about the xorg-commit mailing list