xf86-video-intel: 3 commits - src/sna/gen2_render.c src/sna/kgem.c src/sna/kgem.h src/sna/sna_blt.c

[Chris Wilson]

 src/sna/gen2_render.c |   17 ++++++++++++++++-
 src/sna/kgem.c        |    5 +++--
 src/sna/kgem.h        |    3 +++
 src/sna/sna_blt.c     |    2 ++
 4 files changed, 24 insertions(+), 3 deletions(-)

New commits:
commit 158095ff2b2d38f54ca91d2a728f919cd705ff62
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Tue Jul 2 23:17:32 2013 +0100

    sna/gen2: Fix alpha replication in the copy pipeline
    
    When copying into an a8 surface we need to replicate the result into the
    green channel. It helps to tell the GPU from where to source the value
    to be replicated.
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/gen2_render.c b/src/sna/gen2_render.c
index 71e8a22..ba57643 100644
--- a/src/sna/gen2_render.c
+++ b/src/sna/gen2_render.c
@@ -3105,7 +3105,7 @@ gen2_emit_copy_pipeline(struct sna *sna, const struct sna_composite_op *op)
 	blend = TB0C_LAST_STAGE | TB0C_RESULT_SCALE_1X | TB0C_OP_ARG1 |
 		TB0C_OUTPUT_WRITE_CURRENT;
 	if (op->dst.format == PICT_a8)
-		blend |= TB0C_ARG1_REPLICATE_ALPHA;
+		blend |= TB0C_ARG1_REPLICATE_ALPHA | TB0C_ARG1_SEL_TEXEL0;
 	else if (PICT_FORMAT_RGB(op->src.pict_format) != 0)
 		blend |= TB0C_ARG1_SEL_TEXEL0;
 	else
commit 2b0d36c63817c08990b8ae4efd60df4a11619e0f
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Tue Jul 2 23:16:54 2013 +0100

    sna: Assorted DBG
    
    This DBG was useful for narrowing down the issue in the next patch...
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/gen2_render.c b/src/sna/gen2_render.c
index faf2227..71e8a22 100644
--- a/src/sna/gen2_render.c
+++ b/src/sna/gen2_render.c
@@ -3073,6 +3073,8 @@ gen2_render_copy_setup_source(struct sna_composite_channel *channel,
 			      PixmapPtr pixmap,
 			      struct kgem_bo *bo)
 {
+	assert(pixmap->drawable.width && pixmap->drawable.height);
+
 	channel->filter = PictFilterNearest;
 	channel->repeat = RepeatNone;
 	channel->width  = pixmap->drawable.width;
@@ -3084,6 +3086,11 @@ gen2_render_copy_setup_source(struct sna_composite_channel *channel,
 	channel->pict_format = sna_format_for_depth(pixmap->drawable.depth);
 	channel->bo = bo;
 	channel->is_affine = 1;
+
+	DBG(("%s: source=%d, (%dx%d), format=%08x\n",
+	     __FUNCTION__, bo->handle,
+	     channel->width, channel->height,
+	     channel->pict_format));
 }
 
 static void
@@ -3209,6 +3216,8 @@ fallback:
 			goto fallback;
 	}
 
+	assert(dst_bo->pitch >= 8);
+
 	memset(&tmp, 0, sizeof(tmp));
 	tmp.op = alu;
 
@@ -3220,6 +3229,12 @@ fallback:
 	tmp.dst.x = tmp.dst.y = 0;
 	tmp.damage = NULL;
 
+	DBG(("%s: target=%d, format=%08x, size=%dx%d\n",
+	     __FUNCTION__, dst_bo->handle,
+	     (unsigned)tmp.dst.format,
+	     tmp.dst.width,
+	     tmp.dst.height));
+
 	sna_render_composite_redirect_init(&tmp);
 	if (too_large(tmp.dst.width, tmp.dst.height) ||
 	    dst_bo->pitch > MAX_3D_PITCH) {
diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index 6b5ec46..5386081 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -2270,9 +2270,9 @@ static void kgem_finish_buffers(struct kgem *kgem)
 	struct kgem_buffer *bo, *next;
 
 	list_for_each_entry_safe(bo, next, &kgem->batch_buffers, base.list) {
-		DBG(("%s: buffer handle=%d, used=%d, exec?=%d, write=%d, mmapped=%d\n",
+		DBG(("%s: buffer handle=%d, used=%d, exec?=%d, write=%d, mmapped=%s\n",
 		     __FUNCTION__, bo->base.handle, bo->used, bo->base.exec!=NULL,
-		     bo->write, bo->mmapped));
+		     bo->write, bo->mmapped ? IS_CPU_MAP(bo->base.map) ? "cpu" : "gtt" : "no"));
 
 		assert(next->base.list.prev == &bo->base.list);
 		assert(bo->base.io);
diff --git a/src/sna/sna_blt.c b/src/sna/sna_blt.c
index 2a877eb..e3d6f10 100644
--- a/src/sna/sna_blt.c
+++ b/src/sna/sna_blt.c
@@ -2273,6 +2273,8 @@ put:
 			if (!sna_drawable_move_region_to_cpu(dst->pDrawable,
 							     &region, hint))
 				return false;
+
+			assert(tmp->damage == NULL);
 		}
 
 		region.extents = src_box;
commit 103672869c64a1e42022069f413478c256c0ee00
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Tue Jul 2 20:52:23 2013 +0100

    sna: Add the condition that 855gm cannot GTT map Y-tiled surfaces
    
    We had the check in a couple of places, but missed a key one that
    decided whether or not to perform a GTT mapping of a bo.
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index ac6e739..6b5ec46 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -305,6 +305,7 @@ static void *__kgem_bo_map__gtt(struct kgem *kgem, struct kgem_bo *bo)
 	     bo->handle, bytes(bo)));
 	assert(bo->proxy == NULL);
 	assert(!bo->snoop);
+	assert(kgem_bo_can_map(kgem, bo));
 
 retry_gtt:
 	VG_CLEAR(mmap_arg);
diff --git a/src/sna/kgem.h b/src/sna/kgem.h
index c7c7fce..73ac951 100644
--- a/src/sna/kgem.h
+++ b/src/sna/kgem.h
@@ -520,6 +520,9 @@ static inline bool __kgem_bo_is_mappable(struct kgem *kgem,
 	    bo->presumed_offset & (kgem_bo_fenced_size(kgem, bo) - 1))
 		return false;
 
+	if (kgem->gen == 021 && bo->tiling == I915_TILING_Y)
+		return false;
+
 	if (kgem->has_llc && bo->tiling == I915_TILING_NONE)
 		return true;