xf86-video-intel: configure.ac src/sna/kgem.c

Chris Wilson ickle at kemper.freedesktop.org
Mon Jan 21 03:46:55 PST 2013


 configure.ac   |   18 ------------------
 src/sna/kgem.c |   10 ----------
 2 files changed, 28 deletions(-)

New commits:
commit 5a0bc67ba57cf698e100df617474669ed5d036d6
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Mon Jan 21 11:41:38 2013 +0000

    sna: New execbuffer flags for lut-handle and fast-relocs are upstream
    
    Now the flags are upstream, we can rely on runtime tests as the
    interface is now frozen.
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/configure.ac b/configure.ac
index 317bc6d..cb1496b 100644
--- a/configure.ac
+++ b/configure.ac
@@ -291,24 +291,6 @@ if test "x$USERPTR" = xyes; then
 	AC_DEFINE(USE_USERPTR,1,[Assume USERPTR support])
 fi
 
-AC_ARG_ENABLE(fast-reloc,
-	      AS_HELP_STRING([--enable-fast-reloc],
-			     [Enable use of "fast reloc" (experimental) [default=no]]),
-	      [FASTRELOC="$enableval"],
-	      [FASTRELOC=no])
-if test "x$FASTRELOC" = xyes; then
-	AC_DEFINE(USE_FASTRELOC,1,[Assume "fast reloc" support])
-fi
-
-AC_ARG_ENABLE(handle-lut,
-	      AS_HELP_STRING([--enable-handle-lut],
-			     [Enable use of "handle LUT" (experimental) [default=no]]),
-	      [HANDLE_LUT="$enableval"],
-	      [HANDLE_LUT=no])
-if test "x$HANDLE_LUT" = xyes; then
-	AC_DEFINE(USE_HANDLE_LUT,1,[Assume "handle LUT" support])
-fi
-
 AC_ARG_ENABLE(async-swap,
 	      AS_HELP_STRING([--enable-async-swap],
 			     [Enable use of asynchronous swaps (experimental) [default=no]]),
diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index a5a7a88..7ff98dc 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -81,16 +81,6 @@ search_snoop_cache(struct kgem *kgem, unsigned int num_pages, unsigned flags);
 
 #define SHOW_BATCH 0
 
-#ifndef USE_FASTRELOC
-#undef DBG_NO_FAST_RELOC
-#define DBG_NO_FAST_RELOC 1
-#endif
-
-#ifndef USE_HANDLE_LUT
-#undef DBG_NO_HANDLE_LUT
-#define DBG_NO_HANDLE_LUT 1
-#endif
-
 /* Worst case seems to be 965gm where we cannot write within a cacheline that
  * is being simultaneously being read by the GPU, or within the sampler
  * prefetch. In general, the chipsets seem to have a requirement that sampler


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