xf86-video-intel: 4 commits - src/sna/gen7_render.c src/sna/sna_accel.c

[Chris Wilson]

 src/sna/gen7_render.c |    6 ++++--
 src/sna/sna_accel.c   |   12 +++++-------
 2 files changed, 9 insertions(+), 9 deletions(-)

New commits:
commit b129b434f98b9d875e44af206f6901de9bf28334
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Fri Feb 22 12:10:20 2013 +0000

    sna: Optimise mmap of GPU bo for read-read operations
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index b9e37f1..81fe165 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -1626,11 +1626,9 @@ skip_inplace_map:
 	}
 
 	if (priv->gpu_damage && priv->cpu_damage == NULL &&
-	    ((flags & MOVE_ASYNC_HINT) == 0 ||
-	     !__kgem_bo_is_busy(&sna->kgem, priv->gpu_bo)) &&
-	    priv->gpu_bo->tiling == I915_TILING_NONE) {
-		kgem_bo_submit(&sna->kgem, priv->gpu_bo);
-
+	    priv->gpu_bo->tiling == I915_TILING_NONE &&
+	    ((flags & (MOVE_WRITE | MOVE_ASYNC_HINT)) == 0 ||
+	     !__kgem_bo_is_busy(&sna->kgem, priv->gpu_bo))) {
 		DBG(("%s: try to operate inplace (CPU)\n", __FUNCTION__));
 
 		assert(!priv->mapped);
commit 19bd005056a2083de64753681b96716996e4237d
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Fri Feb 22 12:05:04 2013 +0000

    sna: Avoid migrating and making the GPU bo busy prior to mmapping it
    
    References: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1131134
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index 802fd19..b9e37f1 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -1625,11 +1625,10 @@ skip_inplace_map:
 		priv->mapped = false;
 	}
 
-	if (priv->gpu_damage &&
+	if (priv->gpu_damage && priv->cpu_damage == NULL &&
 	    ((flags & MOVE_ASYNC_HINT) == 0 ||
 	     !__kgem_bo_is_busy(&sna->kgem, priv->gpu_bo)) &&
-	    priv->gpu_bo->tiling == I915_TILING_NONE &&
-	    sna_pixmap_move_to_gpu(pixmap, MOVE_READ)) {
+	    priv->gpu_bo->tiling == I915_TILING_NONE) {
 		kgem_bo_submit(&sna->kgem, priv->gpu_bo);
 
 		DBG(("%s: try to operate inplace (CPU)\n", __FUNCTION__));
@@ -1653,7 +1652,8 @@ skip_inplace_map:
 			}
 
 			kgem_bo_sync__cpu_full(&sna->kgem,
-					       priv->gpu_bo, flags & MOVE_WRITE);
+					       priv->gpu_bo,
+					       flags & MOVE_WRITE);
 			assert_pixmap_damage(pixmap);
 			DBG(("%s: operate inplace (CPU)\n", __FUNCTION__));
 			return true;
commit afb77ffadedf6c6f9321dde1d650004714accdc4
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Fri Feb 22 10:48:06 2013 +0000

    sna/gen7: Skip CLEAR_PARAMS for the null depthbuffer
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/gen7_render.c b/src/sna/gen7_render.c
index 8a08839..d9bb18d 100644
--- a/src/sna/gen7_render.c
+++ b/src/sna/gen7_render.c
@@ -692,9 +692,11 @@ gen7_emit_null_depth_buffer(struct sna *sna)
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
+#if 0
 	OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS | (3 - 2));
 	OUT_BATCH(0);
 	OUT_BATCH(0);
+#endif
 }
 
 static void
commit 1a7262e5308c9ab416ed87226ed27a9fc84f0ef9
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Fri Feb 22 10:30:49 2013 +0000

    sna/gen7: Only a pipeline stall is required for the CA pass
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/gen7_render.c b/src/sna/gen7_render.c
index f05d6f9..8a08839 100644
--- a/src/sna/gen7_render.c
+++ b/src/sna/gen7_render.c
@@ -1063,7 +1063,7 @@ static bool gen7_magic_ca_pass(struct sna *sna,
 	DBG(("%s: CA fixup (%d -> %d)\n", __FUNCTION__,
 	     sna->render.vertex_start, sna->render.vertex_index));
 
-	gen7_emit_pipe_invalidate(sna);
+	gen7_emit_pipe_stall(sna);
 
 	gen7_emit_cc(sna,
 		     GEN7_BLEND(gen7_get_blend(PictOpAdd, true,
@@ -1304,7 +1304,7 @@ static int gen7_get_rectangles__flush(struct sna *sna,
 	if (sna->render.vertex_offset) {
 		gen4_vertex_flush(sna);
 		if (gen7_magic_ca_pass(sna, op)) {
-			gen7_emit_pipe_invalidate(sna);
+			gen7_emit_pipe_stall(sna);
 			gen7_emit_cc(sna, GEN7_BLEND(op->u.gen7.flags));
 			gen7_emit_wm(sna, GEN7_KERNEL(op->u.gen7.flags));
 		}