xf86-video-intel: src/sna/sna_display.c

[Chris Wilson]

 src/sna/sna_display.c |    5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

New commits:
commit 4e2fc5aee035c3059ca33dbcafc71dc5988d6b09
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Tue Apr 2 14:29:29 2013 +0100

    sna: Relax scanline waits on HSW to be emittable from either ring
    
    My overzealous reading of the bspec lead me to the conclusion that the
    MI_LOAD_SCANLINES command was only available on the blitter ring. This
    is false, thankfully, and allows us to do vsync'ed Xv.
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/sna_display.c b/src/sna/sna_display.c
index 6d61650..0d32086 100644
--- a/src/sna/sna_display.c
+++ b/src/sna/sna_display.c
@@ -2887,15 +2887,13 @@ static bool sna_emit_wait_for_scanline_hsw(struct sna *sna,
 	uint32_t event;
 	uint32_t *b;
 
-	if (sna->kgem.mode != KGEM_BLT)
-		return false;
-
 	b = kgem_get_batch(&sna->kgem);
 	sna->kgem.nbatch += 5;
 
 	/* The documentation says that the LOAD_SCAN_LINES command
 	 * always comes in pairs. Don't ask me why. */
 	switch (pipe) {
+	default: assert(0);
 	case 0: event = 0; break;
 	case 1: event = 1 << 19; break;
 	case 2: event = 4 << 19; break;
@@ -2904,6 +2902,7 @@ static bool sna_emit_wait_for_scanline_hsw(struct sna *sna,
 	b[3] = b[1] = (y1 << 16) | (y2-1);
 
 	switch (pipe) {
+	default: assert(0);
 	case 0: event = 0; break;
 	case 1: event = 1 << 8; break;
 	case 2: event = 1 << 14; break;