xf86-video-intel: 6 commits - src/sna/fb src/sna/gen7_render.c src/sna/kgem.c src/sna/sna_accel.c
Chris Wilson
ickle at kemper.freedesktop.org
Wed Sep 5 01:23:18 PDT 2012
src/sna/fb/fbblt.c | 15 +++++++--------
src/sna/gen7_render.c | 10 ++++------
src/sna/kgem.c | 8 +++++++-
src/sna/sna_accel.c | 30 ++++++++++++++++++++++++------
4 files changed, 42 insertions(+), 21 deletions(-)
New commits:
commit 913adacc5400f94bc754f22375447e6f90ccd510
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Wed Sep 5 09:20:55 2012 +0100
sna/gen7: Always emit a stall when flushing the texture cache
Reported-by: Reinhard Karcher <reinhard.karcher at gmx.net>
References: https://bugs.freedesktop.org/show_bug.cgi?id=54488
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/gen7_render.c b/src/sna/gen7_render.c
index 0cc4cba..705a17d 100644
--- a/src/sna/gen7_render.c
+++ b/src/sna/gen7_render.c
@@ -994,12 +994,12 @@ gen7_emit_vertex_elements(struct sna *sna,
}
inline static void
-gen7_emit_pipe_invalidate(struct sna *sna, bool stall)
+gen7_emit_pipe_invalidate(struct sna *sna)
{
OUT_BATCH(GEN7_PIPE_CONTROL | (4 - 2));
OUT_BATCH(GEN7_PIPE_CONTROL_WC_FLUSH |
GEN7_PIPE_CONTROL_TC_FLUSH |
- (stall ? GEN7_PIPE_CONTROL_CS_STALL : 0));
+ GEN7_PIPE_CONTROL_CS_STALL);
OUT_BATCH(0);
OUT_BATCH(0);
}
@@ -1043,9 +1043,7 @@ gen7_emit_state(struct sna *sna,
need_stall &= gen7_emit_drawing_rectangle(sna, op);
if (kgem_bo_is_dirty(op->src.bo) || kgem_bo_is_dirty(op->mask.bo)) {
- if (op->dst.bo == op->src.bo || op->dst.bo == op->mask.bo)
- need_stall = GEN7_BLEND(op->u.gen7.flags) != NO_BLEND;
- gen7_emit_pipe_invalidate(sna, need_stall);
+ gen7_emit_pipe_invalidate(sna);
kgem_clear_dirty(&sna->kgem);
if (op->dst.bo->exec)
kgem_bo_mark_dirty(op->dst.bo);
@@ -1069,7 +1067,7 @@ static void gen7_magic_ca_pass(struct sna *sna,
DBG(("%s: CA fixup (%d -> %d)\n", __FUNCTION__,
sna->render.vertex_start, sna->render.vertex_index));
- gen7_emit_pipe_invalidate(sna, true);
+ gen7_emit_pipe_invalidate(sna);
gen7_emit_cc(sna, gen7_get_blend(PictOpAdd, true, op->dst.format));
gen7_emit_wm(sna,
commit bdfedb46bd5bb3b96543a3ff553abd8ed0774fad
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Wed Sep 5 09:15:12 2012 +0100
sna: Use async upload only if the last render was not CPU
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index 66a0833..3c0736e 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -2986,7 +2986,7 @@ sna_pixmap_move_to_gpu(PixmapPtr pixmap, unsigned flags)
assert(pixmap_contains_damage(pixmap, priv->cpu_damage));
DBG(("%s: uploading %d damage boxes\n", __FUNCTION__, n));
- if (DAMAGE_IS_ALL(priv->cpu_damage))
+ if (!priv->cpu)
flags |= MOVE_ASYNC_HINT;
ok = false;
commit 67b75ae6f66e2d8e97b0aaf70d66b6de30f9e67e
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Wed Sep 5 08:46:39 2012 +0100
sna: Tweak upload path to remove redundant code
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index 7686024..66a0833 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -2996,10 +2996,6 @@ sna_pixmap_move_to_gpu(PixmapPtr pixmap, unsigned flags)
pixmap, priv->cpu_bo, 0, 0,
pixmap, priv->gpu_bo, 0, 0,
box, n, 0);
- if (ok && priv->shm) {
- assert(!priv->flush);
- sna_add_flush_pixmap(sna, priv, priv->cpu_bo);
- }
}
if (!ok) {
if (pixmap->devPrivate.ptr == NULL) {
@@ -3037,10 +3033,12 @@ sna_pixmap_move_to_gpu(PixmapPtr pixmap, unsigned flags)
}
/* For large bo, try to keep only a single copy around */
- if (priv->create & KGEM_CAN_CREATE_LARGE)
+ if (priv->create & KGEM_CAN_CREATE_LARGE) {
sna_damage_all(&priv->gpu_damage,
pixmap->drawable.width,
pixmap->drawable.height);
+ sna_pixmap_free_cpu(sna, priv);
+ }
done:
list_del(&priv->list);
commit 38fb77af757318e5fb6f605b37306ce4585b11a5
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Wed Sep 5 08:23:34 2012 +0100
sna: Don't upload ignored cpu damage
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index 1156e78..7686024 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -61,6 +61,7 @@
#define USE_WIDE_SPANS 0 /* -1 force CPU, 1 force GPU */
#define USE_ZERO_SPANS 1 /* -1 force CPU, 1 force GPU */
#define USE_INACTIVE 0
+#define USE_CPU_BO 1
#define MIGRATE_ALL 0
#define DBG_NO_CPU_UPLOAD 0
@@ -2525,11 +2526,13 @@ sna_drawable_use_bo(DrawablePtr drawable, unsigned flags, const BoxRec *box,
if (DAMAGE_IS_ALL(priv->gpu_damage)) {
DBG(("%s: use GPU fast path (all-damaged)\n", __FUNCTION__));
+ assert(priv->cpu_damage == NULL);
goto use_gpu_bo;
}
if (DAMAGE_IS_ALL(priv->cpu_damage)) {
DBG(("%s: use CPU fast path (all-damaged)\n", __FUNCTION__));
+ assert(priv->gpu_damage == NULL);
goto use_cpu_bo;
}
@@ -2580,6 +2583,20 @@ sna_drawable_use_bo(DrawablePtr drawable, unsigned flags, const BoxRec *box,
goto use_cpu_bo;
}
}
+ } else if (priv->cpu_damage) {
+ get_drawable_deltas(drawable, pixmap, &dx, &dy);
+
+ region.extents = *box;
+ region.extents.x1 += dx;
+ region.extents.x2 += dx;
+ region.extents.y1 += dy;
+ region.extents.y2 += dy;
+
+ sna_damage_subtract(&priv->cpu_damage, ®ion);
+ if (priv->cpu_damage == NULL) {
+ list_del(&priv->list);
+ priv->undamaged = false;
+ }
}
create_gpu_bo:
@@ -2690,6 +2707,9 @@ use_gpu_bo:
return priv->gpu_bo;
use_cpu_bo:
+ if (!USE_CPU_BO)
+ return NULL;
+
if (priv->cpu_bo == NULL)
return NULL;
commit 2eb32f711ddd65a55c3c21f813b41aca49635a22
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Wed Sep 5 00:22:04 2012 +0100
sna: Add DBG control to disable CPU bo
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index 8d38308..7f687f7 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -60,6 +60,7 @@ search_snoop_cache(struct kgem *kgem, unsigned int num_pages, unsigned flags);
#define DBG_NO_TILING 0
#define DBG_NO_CACHE 0
#define DBG_NO_CACHE_LEVEL 0
+#define DBG_NO_CPU 0
#define DBG_NO_USERPTR 0
#define DBG_NO_LLC 0
#define DBG_NO_SEMAPHORES 0
@@ -874,7 +875,7 @@ void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, int gen)
kgem->next_request = __kgem_request_alloc();
DBG(("%s: cpu bo enabled %d: llc? %d, set-cache-level? %d, userptr? %d\n", __FUNCTION__,
- kgem->has_llc | kgem->has_userptr | kgem->has_cacheing,
+ !DBG_NO_CPU && (kgem->has_llc | kgem->has_userptr | kgem->has_cacheing),
kgem->has_llc, kgem->has_cacheing, kgem->has_userptr));
VG_CLEAR(aperture);
@@ -951,6 +952,8 @@ void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, int gen)
kgem->large_object_size = kgem->max_cpu_size;
} else
kgem->max_cpu_size = 0;
+ if (DBG_NO_CPU)
+ kgem->max_cpu_size = 0;
DBG(("%s: maximum object size=%d\n",
__FUNCTION__, kgem->max_object_size));
@@ -3429,6 +3432,9 @@ struct kgem_bo *kgem_create_cpu_2d(struct kgem *kgem,
struct kgem_bo *bo;
int stride, size;
+ if (DBG_NO_CPU)
+ return NULL;
+
DBG(("%s(%dx%d, bpp=%d)\n", __FUNCTION__, width, height, bpp));
if (kgem->has_llc) {
commit 19e170aa6fd3652cc2e983a291f82350dca27e52
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Tue Sep 4 23:52:42 2012 +0100
sna: Fix comparison of memcpy overlap to include x-offsets
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/fb/fbblt.c b/src/sna/fb/fbblt.c
index 3b3fa48..62ed2a1 100644
--- a/src/sna/fb/fbblt.c
+++ b/src/sna/fb/fbblt.c
@@ -287,19 +287,18 @@ fbBlt(FbBits *srcLine, FbStride srcStride, int srcX,
DBG(("%s fast blt, src_stride=%d, dst_stride=%d, width=%d (offset=%d)\n",
__FUNCTION__,
- srcStride, dstStride, width,
- srcLine - dstLine));
+ srcStride, dstStride, width, s - d));
- if ((srcLine < dstLine && srcLine + width > dstLine) ||
- (dstLine < srcLine && dstLine + width > srcLine))
+ if (width == srcStride && width == dstStride) {
+ width *= height;
+ height = 1;
+ }
+
+ if ((s < d && s + width > d) || (d < s && d + width > s))
func = memmove;
else
func = memcpy;
if (!upsidedown) {
- if (srcStride == dstStride && srcStride == width) {
- width *= height;
- height = 1;
- }
for (i = 0; i < height; i++)
func(d + i * dstStride,
s + i * srcStride,
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