xf86-video-intel: 3 commits - src/intel_display.c src/sna/gen2_render.c src/sna/gen3_render.c src/sna/gen4_render.c src/sna/gen5_render.c src/sna/gen6_render.c src/sna/gen7_render.c src/sna/sna_render.c
Chris Wilson
ickle at kemper.freedesktop.org
Tue Jun 5 08:09:38 PDT 2012
src/intel_display.c | 15 +++++++++++++++
src/sna/gen2_render.c | 7 +++++++
src/sna/gen3_render.c | 10 +++++++++-
src/sna/gen4_render.c | 7 +++++++
src/sna/gen5_render.c | 7 +++++++
src/sna/gen6_render.c | 7 +++++++
src/sna/gen7_render.c | 7 +++++++
src/sna/sna_render.c | 6 +++---
8 files changed, 62 insertions(+), 4 deletions(-)
New commits:
commit c4eb5528a456b65c673f7c984d14a622ac67cdca
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Tue Jun 5 16:04:16 2012 +0100
uxa: Check for DPMS off before scheduling a WAIT_ON_EVENT
Regression from commit 3f3bde4f0c72f6f31aae322bcdc20b95eade6631
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Thu May 24 11:58:46 2012 +0100
uxa: Only consider an output valid if the kernel reports it attached
When backporting from SNA, a key difference that UXA does not track DPMS
state in its enabled flag and that a DPMS off CRTC is still bound to the
fb. So we do need to rescan the outputs and check that we have a
connector enabled *and* the pipe is running prior to emitting a scanline
wait.
References: https://bugs.freedesktop.org/show_bug.cgi?id=50668
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/intel_display.c b/src/intel_display.c
index 7d75abb..6f3f7e6 100644
--- a/src/intel_display.c
+++ b/src/intel_display.c
@@ -1716,13 +1716,28 @@ int intel_crtc_to_pipe(xf86CrtcPtr crtc)
Bool intel_crtc_on(xf86CrtcPtr crtc)
{
struct intel_crtc *intel_crtc = crtc->driver_private;
+ xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(crtc->scrn);
drmModeCrtcPtr drm_crtc;
Bool ret;
+ int i;
if (!crtc->enabled)
return FALSE;
/* Kernel manages CRTC status based on output config */
+ ret = FALSE;
+ for (i = 0; i < xf86_config->num_output; i++) {
+ xf86OutputPtr output = xf86_config->output[i];
+ if (output->crtc == crtc &&
+ intel_output_dpms_status(output) == DPMSModeOn) {
+ ret = TRUE;
+ break;
+ }
+ }
+ if (!ret)
+ return FALSE;
+
+ /* And finally check with the kernel that the fb is bound */
drm_crtc = drmModeGetCrtc(intel_crtc->mode->fd, crtc_id(intel_crtc));
if (drm_crtc == NULL)
return FALSE;
commit 7c51cabaecac52348766c622e80ed14b9854e54d
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Tue Jun 5 12:59:46 2012 +0100
sna: Try to create Y-tiled pixmaps for initial source bo
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_render.c b/src/sna/sna_render.c
index e06e3c2..e28823f 100644
--- a/src/sna/sna_render.c
+++ b/src/sna/sna_render.c
@@ -338,7 +338,7 @@ use_cpu_bo(struct sna *sna, PixmapPtr pixmap, const BoxRec *box)
}
if (priv->source_count++*w*h >= (int)pixmap->drawable.width * pixmap->drawable.height &&
- I915_TILING_NONE != kgem_choose_tiling(&sna->kgem, I915_TILING_X,
+ I915_TILING_NONE != kgem_choose_tiling(&sna->kgem, I915_TILING_Y,
pixmap->drawable.width,
pixmap->drawable.height,
pixmap->drawable.bitsPerPixel)) {
@@ -396,7 +396,7 @@ move_to_gpu(PixmapPtr pixmap, const BoxRec *box)
migrate = true;
if ((priv->create & KGEM_CAN_CREATE_GPU) == 0 ||
kgem_choose_tiling(&to_sna_from_pixmap(pixmap)->kgem,
- I915_TILING_X,
+ I915_TILING_Y,
pixmap->drawable.width,
pixmap->drawable.height,
pixmap->drawable.bitsPerPixel) == I915_TILING_NONE)
@@ -413,7 +413,7 @@ move_to_gpu(PixmapPtr pixmap, const BoxRec *box)
count = priv->source_count++;
if ((priv->create & KGEM_CAN_CREATE_GPU) == 0 ||
kgem_choose_tiling(&to_sna_from_pixmap(pixmap)->kgem,
- I915_TILING_X,
+ I915_TILING_Y,
pixmap->drawable.width,
pixmap->drawable.height,
pixmap->drawable.bitsPerPixel) == I915_TILING_NONE)
commit a26c05cc8936cab28d83c6beeff906a910353338
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Tue Jun 5 12:48:33 2012 +0100
sna/gen2+: Tweak placement of operations for CPU-bound large pixmaps
Try to avoid uncessary migration to the GPU of large pixmaps that are
wholly bound to the CPU.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/gen2_render.c b/src/sna/gen2_render.c
index 7b3e1ec..e67dd95 100644
--- a/src/sna/gen2_render.c
+++ b/src/sna/gen2_render.c
@@ -1633,6 +1633,13 @@ gen2_composite_fallback(struct sna *sna,
return TRUE;
}
+ if (too_large(dst_pixmap->drawable.width,
+ dst_pixmap->drawable.height) &&
+ (priv == NULL || DAMAGE_IS_ALL(priv->cpu_damage))) {
+ DBG(("%s: dst is on the CPU and too large\n", __FUNCTION__));
+ return TRUE;
+ }
+
DBG(("%s: dst is not on the GPU and the operation should not fallback\n",
__FUNCTION__));
return FALSE;
diff --git a/src/sna/gen3_render.c b/src/sna/gen3_render.c
index d8d1e09..0037ba0 100644
--- a/src/sna/gen3_render.c
+++ b/src/sna/gen3_render.c
@@ -2658,7 +2658,8 @@ gen3_composite_fallback(struct sna *sna,
if (mask &&
mask->componentAlpha && PICT_FORMAT_RGB(mask->format) &&
- op != PictOpOver)
+ op != PictOpOver &&
+ gen3_blend_op[op].src_blend != BLENDFACT_ZERO)
{
DBG(("%s: component-alpha mask with op=%d, should fallback\n",
__FUNCTION__, op));
@@ -2700,6 +2701,13 @@ gen3_composite_fallback(struct sna *sna,
return TRUE;
}
+ if (too_large(dst_pixmap->drawable.width,
+ dst_pixmap->drawable.height) &&
+ (priv == NULL || DAMAGE_IS_ALL(priv->cpu_damage))) {
+ DBG(("%s: dst is on the CPU and too large\n", __FUNCTION__));
+ return TRUE;
+ }
+
DBG(("%s: dst is not on the GPU and the operation should not fallback\n",
__FUNCTION__));
return FALSE;
diff --git a/src/sna/gen4_render.c b/src/sna/gen4_render.c
index 80f6a95..aafe6d9 100644
--- a/src/sna/gen4_render.c
+++ b/src/sna/gen4_render.c
@@ -2274,6 +2274,13 @@ gen4_composite_fallback(struct sna *sna,
return TRUE;
}
+ if (too_large(dst_pixmap->drawable.width,
+ dst_pixmap->drawable.height) &&
+ (priv == NULL || DAMAGE_IS_ALL(priv->cpu_damage))) {
+ DBG(("%s: dst is on the CPU and too large\n", __FUNCTION__));
+ return TRUE;
+ }
+
DBG(("%s: dst is not on the GPU and the operation should not fallback\n",
__FUNCTION__));
return FALSE;
diff --git a/src/sna/gen5_render.c b/src/sna/gen5_render.c
index 6746a58..d51a83b 100644
--- a/src/sna/gen5_render.c
+++ b/src/sna/gen5_render.c
@@ -2314,6 +2314,13 @@ gen5_composite_fallback(struct sna *sna,
return TRUE;
}
+ if (too_large(dst_pixmap->drawable.width,
+ dst_pixmap->drawable.height) &&
+ (priv == NULL || DAMAGE_IS_ALL(priv->cpu_damage))) {
+ DBG(("%s: dst is on the CPU and too large\n", __FUNCTION__));
+ return TRUE;
+ }
+
DBG(("%s: dst is not on the GPU and the operation should not fallback\n",
__FUNCTION__));
return FALSE;
diff --git a/src/sna/gen6_render.c b/src/sna/gen6_render.c
index 87a2c9c..d3b3e2a 100644
--- a/src/sna/gen6_render.c
+++ b/src/sna/gen6_render.c
@@ -2518,6 +2518,13 @@ gen6_composite_fallback(struct sna *sna,
return TRUE;
}
+ if (too_large(dst_pixmap->drawable.width,
+ dst_pixmap->drawable.height) &&
+ (priv == NULL || DAMAGE_IS_ALL(priv->cpu_damage))) {
+ DBG(("%s: dst is on the CPU and too large\n", __FUNCTION__));
+ return TRUE;
+ }
+
DBG(("%s: dst is not on the GPU and the operation should not fallback\n",
__FUNCTION__));
return FALSE;
diff --git a/src/sna/gen7_render.c b/src/sna/gen7_render.c
index e30d941..0029895 100644
--- a/src/sna/gen7_render.c
+++ b/src/sna/gen7_render.c
@@ -2611,6 +2611,13 @@ gen7_composite_fallback(struct sna *sna,
return TRUE;
}
+ if (too_large(dst_pixmap->drawable.width,
+ dst_pixmap->drawable.height) &&
+ (priv == NULL || DAMAGE_IS_ALL(priv->cpu_damage))) {
+ DBG(("%s: dst is on the CPU and too large\n", __FUNCTION__));
+ return TRUE;
+ }
+
DBG(("%s: dst is not on the GPU and the operation should not fallback\n",
__FUNCTION__));
return FALSE;
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