xf86-video-intel: 3 commits - man/intel.man src/intel_driver.c src/intel_uxa.c src/sna/kgem.c src/sna/sna_accel.c src/sna/sna_driver.c src/sna/sna.h
Chris Wilson
ickle at kemper.freedesktop.org
Sun Dec 16 07:27:47 PST 2012
man/intel.man | 18 ++++++++++++++++++
src/intel_driver.c | 3 ++-
src/intel_uxa.c | 14 +++++++++++++-
src/sna/kgem.c | 9 ++++++---
src/sna/sna.h | 1 -
src/sna/sna_accel.c | 16 +++++++++++++---
src/sna/sna_driver.c | 3 ++-
7 files changed, 54 insertions(+), 10 deletions(-)
New commits:
commit c7ac12003bd0c7d85fa47d43ee2734b222d84a61
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Sun Dec 16 15:28:24 2012 +0000
sna: Only flush at the low fence wm if idle
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index 6a10b33..fc97737 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -3908,7 +3908,8 @@ bool kgem_check_bo_fenced(struct kgem *kgem, struct kgem_bo *bo)
if (kgem->nfence >= kgem->fence_max)
return false;
- if (3*kgem->aperture_fenced > kgem->aperture_mappable)
+ if (3*kgem->aperture_fenced > kgem->aperture_mappable &&
+ kgem_ring_is_idle(kgem, kgem->ring))
return false;
size = kgem->aperture_fenced;
@@ -3937,7 +3938,8 @@ bool kgem_check_bo_fenced(struct kgem *kgem, struct kgem_bo *bo)
if (kgem->nfence >= kgem->fence_max)
return false;
- if (3*kgem->aperture_fenced > kgem->aperture_mappable)
+ if (3*kgem->aperture_fenced > kgem->aperture_mappable &&
+ kgem_ring_is_idle(kgem, kgem->ring))
return false;
size = kgem->aperture_fenced;
@@ -3987,7 +3989,8 @@ bool kgem_check_many_bo_fenced(struct kgem *kgem, ...)
if (kgem->nfence + num_fence > kgem->fence_max)
return false;
- if (3*kgem->aperture_fenced > kgem->aperture_mappable)
+ if (3*kgem->aperture_fenced > kgem->aperture_mappable &&
+ kgem_ring_is_idle(kgem, kgem->ring))
return false;
if (3*(fenced_size + kgem->aperture_fenced) > 2*kgem->aperture_mappable)
commit 4580bbeac0051417cb03f272112b0cfe697e31b3
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Sun Dec 16 15:00:21 2012 +0000
intel: Support debugging through AccelMethod
Ease debugging by allowing all acceleration or render acceleration to be
disabled through AccelMethod:
Option "AccelMethod" "off" -> disable all acceleration
Option "AccelMethod" "blt" -> disable render acceleration (only use BLT)
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/man/intel.man b/man/intel.man
index 33ccb2d..16db521 100644
--- a/man/intel.man
+++ b/man/intel.man
@@ -128,6 +128,9 @@ Acceleration Architecture) is the mature backend that was introduced to support
the GEM driver model. It is in the process of being superseded by \*qSNA\*q
(Sandybridge's New Acceleration). Until that process is complete, the ability to
choose which backend to use remains for backwards compatibility.
+In addition, there are a pair of sub-options to limit the acceleration for
+debuging use. Specify \*qoff\*q to disable all acceleration, or \*qblt\*q to
+disable render acceleration and only use the BLT engine.
.IP
Default: use UXA (render acceleration)
.TP
diff --git a/src/intel_driver.c b/src/intel_driver.c
index 5a176dc..5d3e103 100644
--- a/src/intel_driver.c
+++ b/src/intel_driver.c
@@ -405,7 +405,8 @@ static Bool can_accelerate_blt(struct intel_screen_private *intel)
if (INTEL_INFO(intel)->gen == -1)
return FALSE;
- if (xf86ReturnOptValBool(intel->Options, OPTION_ACCEL_DISABLE, FALSE)) {
+ if (xf86ReturnOptValBool(intel->Options, OPTION_ACCEL_DISABLE, FALSE) ||
+ !intel_option_cast_string_to_bool(intel, OPTION_ACCEL_METHOD, TRUE)) {
xf86DrvMsg(intel->scrn->scrnIndex, X_CONFIG,
"Disabling hardware acceleration.\n");
return FALSE;
diff --git a/src/intel_uxa.c b/src/intel_uxa.c
index 76a3146..60ab3a6 100644
--- a/src/intel_uxa.c
+++ b/src/intel_uxa.c
@@ -1292,6 +1292,17 @@ intel_limits_init(intel_screen_private *intel)
}
}
+static Bool intel_option_accel_blt(intel_screen_private *intel)
+{
+ const char *s;
+
+ s = xf86GetOptValString(intel->Options, OPTION_ACCEL_METHOD);
+ if (s == NULL)
+ return false;
+
+ return strcasecmp(s, "blt") == 0;
+}
+
Bool intel_uxa_init(ScreenPtr screen)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
@@ -1338,7 +1349,8 @@ Bool intel_uxa_init(ScreenPtr screen)
intel->uxa_driver->done_copy = intel_uxa_done;
/* Composite */
- if (IS_GEN2(intel)) {
+ if (intel_option_accel_blt(intel)) {
+ } else if (IS_GEN2(intel)) {
intel->uxa_driver->check_composite = i830_check_composite;
intel->uxa_driver->check_composite_target = i830_check_composite_target;
intel->uxa_driver->check_composite_texture = i830_check_composite_texture;
diff --git a/src/sna/sna.h b/src/sna/sna.h
index 8861fd9..c7ebbd9 100644
--- a/src/sna/sna.h
+++ b/src/sna/sna.h
@@ -79,7 +79,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define DBG(x)
#endif
-#define DEBUG_NO_RENDER 0
#define DEBUG_NO_BLT 0
#define DEBUG_FLUSH_BATCH 0
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index f59f153..2c6347d 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -29,6 +29,7 @@
#include "config.h"
#endif
+#include "intel_options.h"
#include "sna.h"
#include "sna_reg.h"
#include "rop.h"
@@ -14208,6 +14209,17 @@ static bool sna_picture_init(ScreenPtr screen)
return true;
}
+static bool sna_option_accel_blt(struct sna *sna)
+{
+ const char *s;
+
+ s = xf86GetOptValString(sna->Options, OPTION_ACCEL_METHOD);
+ if (s == NULL)
+ return false;
+
+ return strcasecmp(s, "blt") == 0;
+}
+
bool sna_accel_init(ScreenPtr screen, struct sna *sna)
{
const char *backend;
@@ -14286,8 +14298,7 @@ bool sna_accel_init(ScreenPtr screen, struct sna *sna)
sna->have_render = false;
no_render_init(sna);
-#if !DEBUG_NO_RENDER
- if (sna->info->gen >= 0100) {
+ if (sna_option_accel_blt(sna) || sna->info->gen >= 0100) {
} else if (sna->info->gen >= 070) {
if ((sna->have_render = gen7_render_init(sna)))
backend = "IvyBridge";
@@ -14307,7 +14318,6 @@ bool sna_accel_init(ScreenPtr screen, struct sna *sna)
if ((sna->have_render = gen2_render_init(sna)))
backend = "gen2";
}
-#endif
DBG(("%s(backend=%s, have_render=%d)\n",
__FUNCTION__, backend, sna->have_render));
diff --git a/src/sna/sna_driver.c b/src/sna/sna_driver.c
index 22770c7..ff0c776 100644
--- a/src/sna/sna_driver.c
+++ b/src/sna/sna_driver.c
@@ -473,7 +473,8 @@ static Bool sna_pre_init(ScrnInfoPtr scrn, int flags)
intel_detect_chipset(scrn, sna->pEnt, sna->PciInfo);
kgem_init(&sna->kgem, fd, sna->PciInfo, sna->info->gen);
- if (xf86ReturnOptValBool(sna->Options, OPTION_ACCEL_DISABLE, FALSE)) {
+ if (xf86ReturnOptValBool(sna->Options, OPTION_ACCEL_DISABLE, FALSE) ||
+ !sna_option_cast_to_bool(sna, OPTION_ACCEL_METHOD, TRUE)) {
xf86DrvMsg(sna->scrn->scrnIndex, X_CONFIG,
"Disabling hardware acceleration.\n");
sna->kgem.wedged = true;
commit 58770b7d6401d2d81f7fee1c8c0e788d44149712
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Sun Dec 16 14:59:03 2012 +0000
man: Describe Option "AccelMethod"
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/man/intel.man b/man/intel.man
index 0942dc1..33ccb2d 100644
--- a/man/intel.man
+++ b/man/intel.man
@@ -116,6 +116,21 @@ The following driver
.B Options
are supported for the 830M and later chipsets:
.TP
+.BI "Option \*qNoAccel\*q \*q" boolean \*q
+Disable or enable acceleration.
+.IP
+Default: acceleration is enabled.
+.TP
+.BI "Option \*qAccelMethod\*q \*q" string \*q
+Select acceleration method.
+There are a couple of backends available for accelerating the DDX. \*qUXA\*q (Unified
+Acceleration Architecture) is the mature backend that was introduced to support
+the GEM driver model. It is in the process of being superseded by \*qSNA\*q
+(Sandybridge's New Acceleration). Until that process is complete, the ability to
+choose which backend to use remains for backwards compatibility.
+.IP
+Default: use UXA (render acceleration)
+.TP
.BI "Option \*qVideoKey\*q \*q" integer \*q
This is the same as the
.B \*qColorKey\*q
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