xf86-video-intel: src/intel_dri.c

[Jesse Barnes]

 src/intel_dri.c |    8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

New commits:
commit 2ab29a1688cd313768d928e87e145570f35b4a70
Author: Jesse Barnes <jbarnes at virtuousgeek.org>
Date:   Mon Dec 10 14:55:32 2012 -0800

    dri2: don't schedule a flip prematurely at ScheduleSwap time
    
    If divisor is 0 but the current MSC is behind the target, we shouldn't
    schedule a flip (which will occur at the next vblank) or we'll end up
    displaying it early and returning the wrong timestamp.
    
    Preserve the optimization though by allowing us to schedule a flip if
    both the divisor is 0 and the current MSC is equal to or ahead of the
    target; this avoids a round trip through the kernel.
    
    Reported-by: Mario Kleiner <mario.kleiner at tuebingen.mpg.de>
    Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>

diff --git a/src/intel_dri.c b/src/intel_dri.c
index 25a7b9e..42b8ee8 100644
--- a/src/intel_dri.c
+++ b/src/intel_dri.c
@@ -1230,7 +1230,13 @@ I830DRI2ScheduleSwap(ClientPtr client, DrawablePtr draw, DRI2BufferPtr front,
 	 * the swap.
 	 */
 	if (divisor == 0 || current_msc < *target_msc) {
-		if (flip && I830DRI2ScheduleFlip(intel, draw, swap_info))
+		/*
+		 * If we can, schedule the flip directly from here rather
+		 * than waiting for an event from the kernel for the current
+		 * (or a past) MSC.
+		 */
+		if (flip && divisor == 0 && current_msc >= *target_msc &&
+		    I830DRI2ScheduleFlip(intel, draw, swap_info))
 			return TRUE;
 
 		vbl.request.type =