xf86-video-intel: 2 commits - src/sna/gen5_render.c src/sna/sna_dri.c

[Chris Wilson]

 src/sna/gen5_render.c |   28 ++++++++++++----------------
 src/sna/sna_dri.c     |    2 +-
 2 files changed, 13 insertions(+), 17 deletions(-)

New commits:
commit 37eb7343be1aeeb90a860096756603a577df1a77
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Sat Dec 1 09:40:11 2012 +0000

    sna/gen5: Inspired by gen4, reorder the flushing
    
    This may not be totally safe, but it is a nicer explanation for random
    single character corruption.
    
    References: https://bugs.freedesktop.org/show_bug.cgi?id=51422
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/gen5_render.c b/src/sna/gen5_render.c
index 7dd6dee..17c221e 100644
--- a/src/sna/gen5_render.c
+++ b/src/sna/gen5_render.c
@@ -1206,12 +1206,12 @@ gen5_align_vertex(struct sna *sna, const struct sna_composite_op *op)
 	}
 }
 
-static bool
+static void
 gen5_emit_binding_table(struct sna *sna, uint16_t offset)
 {
 	if (!DBG_NO_STATE_CACHE &&
 	    sna->render_state.gen5.surface_table == offset)
-		return false;
+		return;
 
 	sna->render_state.gen5.surface_table = offset;
 
@@ -1223,8 +1223,6 @@ gen5_emit_binding_table(struct sna *sna, uint16_t offset)
 	OUT_BATCH(0);		/* sf */
 	/* Only the PS uses the binding table */
 	OUT_BATCH(offset*4);
-
-	return true;
 }
 
 static bool
@@ -1371,23 +1369,21 @@ gen5_emit_state(struct sna *sna,
 		const struct sna_composite_op *op,
 		uint16_t offset)
 {
-	bool flush;
+	if (kgem_bo_is_dirty(op->src.bo) || kgem_bo_is_dirty(op->mask.bo)) {
+		DBG(("%s: flushing dirty (%d, %d)\n", __FUNCTION__,
+		     kgem_bo_is_dirty(op->src.bo),
+		     kgem_bo_is_dirty(op->mask.bo)));
+		OUT_BATCH(MI_FLUSH);
+		kgem_clear_dirty(&sna->kgem);
+		kgem_bo_mark_dirty(op->dst.bo);
+	}
 
 	/* drawrect must be first for Ironlake BLT workaround */
 	gen5_emit_drawing_rectangle(sna, op);
-
-	flush = gen5_emit_binding_table(sna, offset);
-	if (gen5_emit_pipelined_pointers(sna, op, op->op, op->u.gen5.wm_kernel)) {
+	gen5_emit_binding_table(sna, offset);
+	if (gen5_emit_pipelined_pointers(sna, op, op->op, op->u.gen5.wm_kernel))
 		gen5_emit_urb(sna);
-		flush = true;
-	}
 	gen5_emit_vertex_elements(sna, op);
-
-	if (flush || kgem_bo_is_dirty(op->src.bo) || kgem_bo_is_dirty(op->mask.bo)) {
-		OUT_BATCH(MI_FLUSH);
-		kgem_clear_dirty(&sna->kgem);
-		kgem_bo_mark_dirty(op->dst.bo);
-	}
 }
 
 static void gen5_bind_surfaces(struct sna *sna,
commit a8a99428c14c8aed2082853cc60d0f98a1fa2d86
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Sat Dec 1 09:44:49 2012 +0000

    sna/dri: Unknown generations are given the max value and presume i965_dri.so
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/sna_dri.c b/src/sna/sna_dri.c
index 2568c6b..6976143 100644
--- a/src/sna/sna_dri.c
+++ b/src/sna/sna_dri.c
@@ -2419,7 +2419,7 @@ static const char *dri_driver_name(struct sna *sna)
 	Bool dummy;
 
 	if (s == NULL || xf86getBoolValue(&dummy, s))
-		return (sna->kgem.gen && sna->kgem.gen < 040) ? "i915" : "i965";
+		return sna->kgem.gen < 040 ? "i915" : "i965";
 
 	return s;
 }