xf86-video-intel: 7 commits - src/sna/compiler.h src/sna/kgem.c src/sna/sna_accel.c src/sna/sna_display.c
Chris Wilson
ickle at kemper.freedesktop.org
Tue Nov 8 14:17:12 PST 2011
src/sna/compiler.h | 8
src/sna/kgem.c | 35 +++-
src/sna/sna_accel.c | 426 +++++++++++++++++++++++++-------------------------
src/sna/sna_display.c | 6
4 files changed, 257 insertions(+), 218 deletions(-)
New commits:
commit 1cd06100185a37ee33209fb18362da89f9646e6b
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Tue Nov 8 17:37:44 2011 +0000
sna: Protect against NULL deference of damage after reduction
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index d5723ee..26116cd 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -1433,7 +1433,8 @@ sna_put_xybitmap_blt(DrawablePtr drawable, GCPtr gc, RegionPtr region,
return false;
assert_pixmap_contains_box(pixmap, RegionExtents(region));
- sna_damage_add(damage, region);
+ if (damage)
+ sna_damage_add(damage, region);
DBG(("%s: upload(%d, %d, %d, %d)\n", __FUNCTION__, x, y, w, h));
@@ -1550,7 +1551,8 @@ sna_put_xypixmap_blt(DrawablePtr drawable, GCPtr gc, RegionPtr region,
return false;
assert_pixmap_contains_box(pixmap, RegionExtents(region));
- sna_damage_add(damage, region);
+ if (damage)
+ sna_damage_add(damage, region);
DBG(("%s: upload(%d, %d, %d, %d)\n", __FUNCTION__, x, y, w, h));
commit 4b100b099a4d5877c79989e8b3b4ffcd3aa2306f
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Tue Nov 8 16:30:22 2011 +0000
sna: Convert stippled spans to rects
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index b9b82cc..d5723ee 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -2620,11 +2620,18 @@ sna_spans_extents(DrawablePtr drawable, GCPtr gc,
}
static Bool
-sna_poly_fill_rect_tiled(DrawablePtr drawable,
- struct kgem_bo *bo,
- struct sna_damage **damage,
- GCPtr gc, int n, xRectangle *rect,
- const BoxRec *extents, unsigned clipped);
+sna_poly_fill_rect_tiled_blt(DrawablePtr drawable,
+ struct kgem_bo *bo,
+ struct sna_damage **damage,
+ GCPtr gc, int n, xRectangle *rect,
+ const BoxRec *extents, unsigned clipped);
+
+static bool
+sna_poly_fill_rect_stippled_blt(DrawablePtr drawable,
+ struct kgem_bo *bo,
+ struct sna_damage **damage,
+ GCPtr gc, int n, xRectangle *rect,
+ const BoxRec *extents, unsigned clipped);
static bool
can_fill_spans(DrawablePtr drawable, GCPtr gc)
@@ -2692,7 +2699,7 @@ sna_fill_spans(DrawablePtr drawable, GCPtr gc, int n,
gc, n, pt, width, sorted,
®ion.extents, flags & 2))
return;
- } else if (gc->fillStyle == FillTiled) {
+ } else {
struct sna_pixmap *priv = sna_pixmap_from_drawable(drawable);
struct sna_damage **damage;
@@ -2714,10 +2721,17 @@ sna_fill_spans(DrawablePtr drawable, GCPtr gc, int n,
rect[i].height = 1;
}
- i = sna_poly_fill_rect_tiled(drawable,
- priv->gpu_bo, damage,
- gc, n, rect,
- ®ion.extents, flags & 2);
+ if (gc->fillStyle == FillTiled) {
+ i = sna_poly_fill_rect_tiled_blt(drawable,
+ priv->gpu_bo, damage,
+ gc, n, rect,
+ ®ion.extents, flags & 2);
+ } else {
+ i = sna_poly_fill_rect_stippled_blt(drawable,
+ priv->gpu_bo, damage,
+ gc, n, rect,
+ ®ion.extents, flags & 2);
+ }
free (rect);
if (i)
@@ -5770,11 +5784,11 @@ get_pixel(PixmapPtr pixmap)
}
static Bool
-sna_poly_fill_rect_tiled(DrawablePtr drawable,
- struct kgem_bo *bo,
- struct sna_damage **damage,
- GCPtr gc, int n, xRectangle *rect,
- const BoxRec *extents, unsigned clipped)
+sna_poly_fill_rect_tiled_blt(DrawablePtr drawable,
+ struct kgem_bo *bo,
+ struct sna_damage **damage,
+ GCPtr gc, int n, xRectangle *rect,
+ const BoxRec *extents, unsigned clipped)
{
struct sna *sna = to_sna_from_drawable(drawable);
PixmapPtr pixmap = get_drawable_pixmap(drawable);
@@ -6743,17 +6757,17 @@ sna_poly_fill_rect(DrawablePtr draw, GCPtr gc, int n, xRectangle *rect)
DBG(("%s: tiled fill, testing for blt\n", __FUNCTION__));
if (sna_drawable_use_gpu_bo(draw, ®ion.extents, &damage) &&
- sna_poly_fill_rect_tiled(draw,
- priv->gpu_bo, damage,
- gc, n, rect,
- ®ion.extents, flags & 2))
+ sna_poly_fill_rect_tiled_blt(draw,
+ priv->gpu_bo, damage,
+ gc, n, rect,
+ ®ion.extents, flags & 2))
return;
if (sna_drawable_use_cpu_bo(draw, ®ion.extents, &damage) &&
- sna_poly_fill_rect_tiled(draw,
- priv->cpu_bo, damage,
- gc, n, rect,
- ®ion.extents, flags & 2))
+ sna_poly_fill_rect_tiled_blt(draw,
+ priv->cpu_bo, damage,
+ gc, n, rect,
+ ®ion.extents, flags & 2))
return;
} else {
struct sna_pixmap *priv = sna_pixmap_from_drawable(draw);
commit 7b95f87b26675af3a1923fef824c45e087098d61
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Tue Nov 8 16:18:58 2011 +0000
sna: Use the blitter for overlapping lines if the alu doesn't read dst
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index 873007d..b9b82cc 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -4056,9 +4056,8 @@ sna_poly_line(DrawablePtr drawable, GCPtr gc,
gc->lineWidth,
gc->planemask, PM_IS_SOLID(drawable, gc->planemask),
flags & 2));
- if (gc->fillStyle == FillSolid &&
- gc->lineStyle == LineSolid &&
- (gc->lineWidth == 0 || (gc->lineWidth == 1 && n == 1)) &&
+ if (gc->fillStyle == FillSolid && gc->lineStyle == LineSolid &&
+ (gc->lineWidth == 0 || (gc->lineWidth == 1 && (n == 1 || gc->alu == GXcopy))) &&
PM_IS_SOLID(drawable, gc->planemask)) {
struct sna_pixmap *priv = sna_pixmap_from_drawable(drawable);
struct sna_damage **damage;
commit 9a8d3a9dfff8be65b4ab28312ec49dbca36019e0
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Tue Nov 8 13:51:00 2011 +0000
sna: Avoid the penalty of only writing partial channels with glyphs
Yes, writing 3 channels is slower than writing 4. But it's okay we
simply ignore the alpha value anyway.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index 018f406..873007d 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -6941,7 +6941,7 @@ sna_glyph_blt(DrawablePtr drawable, GCPtr gc,
_kgem_set_mode(&sna->kgem, KGEM_BLT);
}
b = sna->kgem.batch + sna->kgem.nbatch;
- b[0] = XY_SETUP_BLT | 1 << 20;
+ b[0] = XY_SETUP_BLT | 3 << 20;
b[1] = bo->pitch;
if (sna->kgem.gen >= 40) {
if (bo->tiling)
@@ -6993,7 +6993,7 @@ sna_glyph_blt(DrawablePtr drawable, GCPtr gc,
_kgem_set_mode(&sna->kgem, KGEM_BLT);
b = sna->kgem.batch + sna->kgem.nbatch;
- b[0] = XY_SETUP_BLT | 1 << 20;
+ b[0] = XY_SETUP_BLT | 3 << 20;
b[1] = bo->pitch;
if (sna->kgem.gen >= 40) {
if (bo->tiling)
commit 576c5169efd068c364fb7d266fbb6b1dd2ad3f4d
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Tue Nov 8 13:27:05 2011 +0000
sna: Tidy sna_copy_bitmap_blt
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index 38e2f2a..018f406 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -2775,8 +2775,8 @@ sna_copy_bitmap_blt(DrawablePtr _bitmap, DrawablePtr drawable, GCPtr gc,
PixmapPtr pixmap = get_drawable_pixmap(drawable);
struct sna_pixmap *priv = sna_pixmap(pixmap);
PixmapPtr bitmap = (PixmapPtr)_bitmap;
+ uint32_t br00, br13;
int16_t dx, dy;
- uint8_t rop = copy_ROP[gc->alu];
DBG(("%s: plane=%x x%d\n", __FUNCTION__, (unsigned)bitplane, n));
@@ -2787,6 +2787,16 @@ sna_copy_bitmap_blt(DrawablePtr _bitmap, DrawablePtr drawable, GCPtr gc,
if (closure)
sna_damage_add_boxes(closure, box, n, dx, dy);
+ br00 = 3 << 20;
+ br13 = priv->gpu_bo->pitch;
+ if (sna->kgem.gen >= 40) {
+ if (priv->gpu_bo->tiling)
+ br00 |= BLT_DST_TILED;
+ br13 >>= 2;
+ }
+ br13 |= blt_depth(drawable->depth) << 24;
+ br13 |= copy_ROP[gc->alu] << 16;
+
kgem_set_mode(&sna->kgem, KGEM_BLT);
do {
int bx1 = (box->x1 + sx) & ~7;
@@ -2815,18 +2825,9 @@ sna_copy_bitmap_blt(DrawablePtr _bitmap, DrawablePtr drawable, GCPtr gc,
}
b = sna->kgem.batch + sna->kgem.nbatch;
- b[0] = XY_MONO_SRC_COPY_IMM | (5 + src_stride);
- if (drawable->bitsPerPixel == 32)
- b[0] |= 3 << 20;
+ b[0] = XY_MONO_SRC_COPY_IMM | (5 + src_stride) | br00;
b[0] |= ((box->x1 + sx) & 7) << 17;
- b[1] = priv->gpu_bo->pitch;
- if (sna->kgem.gen >= 40) {
- if (priv->gpu_bo->tiling)
- b[0] |= BLT_DST_TILED;
- b[1] >>= 2;
- }
- b[1] |= blt_depth(drawable->depth) << 24;
- b[1] |= rop << 16;
+ b[1] = br13;
b[2] = (box->y1 + dy) << 16 | (box->x1 + dx);
b[3] = (box->y2 + dy) << 16 | (box->x2 + dx);
b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4,
@@ -2841,18 +2842,17 @@ sna_copy_bitmap_blt(DrawablePtr _bitmap, DrawablePtr drawable, GCPtr gc,
sna->kgem.nbatch += 7 + src_stride;
dst = (uint8_t *)&b[7];
- bstride -= bw;
-
src_stride = bitmap->devKind;
- src = (uint8_t*)bitmap->devPrivate.ptr;
+ src = bitmap->devPrivate.ptr;
src += (box->y1 + sy) * src_stride + bx1/8;
- src_stride -= bw;
+ src_stride -= bstride;
do {
- int i = bw;
+ int i = bstride;
do {
*dst++ = byte_reverse(*src++);
- } while (--i);
- dst += bstride;
+ *dst++ = byte_reverse(*src++);
+ i -= 2;
+ } while (i);
src += src_stride;
} while (--bh);
} else {
@@ -2873,35 +2873,10 @@ sna_copy_bitmap_blt(DrawablePtr _bitmap, DrawablePtr drawable, GCPtr gc,
if (!upload)
break;
- dst = ptr;
- bstride -= bw;
-
- src_stride = bitmap->devKind;
- src = (uint8_t*)bitmap->devPrivate.ptr;
- src += (box->y1 + sy) * src_stride + bx1/8;
- src_stride -= bw;
- do {
- int i = bw;
- do {
- *dst++ = byte_reverse(*src++);
- } while (--i);
- dst += bstride;
- src += src_stride;
- } while (--bh);
-
b = sna->kgem.batch + sna->kgem.nbatch;
- b[0] = XY_MONO_SRC_COPY;
- if (drawable->bitsPerPixel == 32)
- b[0] |= 3 << 20;
+ b[0] = XY_MONO_SRC_COPY | br00;
b[0] |= ((box->x1 + sx) & 7) << 17;
- b[1] = priv->gpu_bo->pitch;
- if (sna->kgem.gen >= 40) {
- if (priv->gpu_bo->tiling)
- b[0] |= BLT_DST_TILED;
- b[1] >>= 2;
- }
- b[1] |= blt_depth(drawable->depth) << 24;
- b[1] |= rop << 16;
+ b[1] = br13;
b[2] = (box->y1 + dy) << 16 | (box->x1 + dx);
b[3] = (box->y2 + dy) << 16 | (box->x2 + dx);
b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4,
@@ -2919,6 +2894,22 @@ sna_copy_bitmap_blt(DrawablePtr _bitmap, DrawablePtr drawable, GCPtr gc,
b[7] = gc->fgPixel;
sna->kgem.nbatch += 8;
+
+ dst = ptr;
+ src_stride = bitmap->devKind;
+ src = bitmap->devPrivate.ptr;
+ src += (box->y1 + sy) * src_stride + bx1/8;
+ src_stride -= bstride;
+ do {
+ int i = bstride;
+ do {
+ *dst++ = byte_reverse(*src++);
+ *dst++ = byte_reverse(*src++);
+ i -= 2;
+ } while (i);
+ src += src_stride;
+ } while (--bh);
+
kgem_bo_destroy(&sna->kgem, upload);
}
commit 32bbeefb8563ae2ab3a105d0b1c9b55d9587b788
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Tue Nov 8 13:17:20 2011 +0000
sna: Pack clipped stippled uploads
This are even more likely to fit inside the immediate payload.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index 7294e3f..38e2f2a 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -6192,7 +6192,7 @@ sna_poly_fill_rect_stippled_1_blt(DrawablePtr drawable,
PixmapPtr stipple = gc->stipple;
const DDXPointRec *origin = &gc->patOrg;
int16_t dx, dy;
- uint8_t rop = copy_ROP[gc->alu];
+ uint32_t br00, br13;
DBG(("%s: upload (%d, %d), (%d, %d), origin (%d, %d)\n", __FUNCTION__,
extents->x1, extents->y1,
@@ -6202,6 +6202,17 @@ sna_poly_fill_rect_stippled_1_blt(DrawablePtr drawable,
get_drawable_deltas(drawable, pixmap, &dx, &dy);
kgem_set_mode(&sna->kgem, KGEM_BLT);
+ br00 = 3 << 20;
+ br13 = priv->gpu_bo->pitch;
+ if (sna->kgem.gen >= 40) {
+ if (priv->gpu_bo->tiling)
+ br00 |= BLT_DST_TILED;
+ br13 >>= 2;
+ }
+ br13 |= (gc->fillStyle == FillStippled) << 29;
+ br13 |= blt_depth(drawable->depth) << 24;
+ br13 |= copy_ROP[gc->alu] << 16;
+
if (!clipped) {
dx += drawable->x;
dy += drawable->y;
@@ -6233,19 +6244,9 @@ sna_poly_fill_rect_stippled_1_blt(DrawablePtr drawable,
}
b = sna->kgem.batch + sna->kgem.nbatch;
- b[0] = XY_MONO_SRC_COPY_IMM | (5 + src_stride);
- if (drawable->bitsPerPixel == 32)
- b[0] |= 3 << 20;
+ b[0] = XY_MONO_SRC_COPY_IMM | (5 + src_stride) | br00;
b[0] |= ((r->x - origin->x) & 7) << 17;
- b[1] = priv->gpu_bo->pitch;
- if (sna->kgem.gen >= 40) {
- if (priv->gpu_bo->tiling)
- b[0] |= BLT_DST_TILED;
- b[1] >>= 2;
- }
- b[1] |= (gc->fillStyle == FillStippled) << 29;
- b[1] |= blt_depth(drawable->depth) << 24;
- b[1] |= rop << 16;
+ b[1] = br13;
b[2] = (r->y + dy) << 16 | (r->x + dx);
b[3] = (r->y + r->height + dy) << 16 | (r->x + r->width + dx);
b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4,
@@ -6260,18 +6261,17 @@ sna_poly_fill_rect_stippled_1_blt(DrawablePtr drawable,
sna->kgem.nbatch += 7 + src_stride;
dst = (uint8_t *)&b[7];
- bstride -= bw;
-
src_stride = stipple->devKind;
- src = (uint8_t*)stipple->devPrivate.ptr;
+ src = stipple->devPrivate.ptr;
src += (r->y - origin->y) * src_stride + bx1/8;
- src_stride -= bw;
+ src_stride -= bstride;
do {
- int i = bw;
+ int i = bstride;
do {
*dst++ = byte_reverse(*src++);
- } while (--i);
- dst += bstride;
+ *dst++ = byte_reverse(*src++);
+ i -= 2;
+ } while (i);
src += src_stride;
} while (--bh);
} else {
@@ -6293,34 +6293,23 @@ sna_poly_fill_rect_stippled_1_blt(DrawablePtr drawable,
break;
dst = ptr;
- bstride -= bw;
-
src_stride = stipple->devKind;
- src = (uint8_t*)stipple->devPrivate.ptr;
+ src = stipple->devPrivate.ptr;
src += (r->y - origin->y) * src_stride + bx1/8;
- src_stride -= bw;
+ src_stride -= bstride;
do {
- int i = bw;
+ int i = bstride;
do {
*dst++ = byte_reverse(*src++);
- } while (--i);
- dst += bstride;
+ *dst++ = byte_reverse(*src++);
+ i -= 2;
+ } while (i);
src += src_stride;
} while (--bh);
b = sna->kgem.batch + sna->kgem.nbatch;
- b[0] = XY_MONO_SRC_COPY;
- if (drawable->bitsPerPixel == 32)
- b[0] |= 3 << 20;
+ b[0] = XY_MONO_SRC_COPY | br00;
b[0] |= ((r->x - origin->x) & 7) << 17;
- b[1] = priv->gpu_bo->pitch;
- if (sna->kgem.gen >= 40) {
- if (priv->gpu_bo->tiling)
- b[0] |= BLT_DST_TILED;
- b[1] >>= 2;
- }
- b[1] |= (gc->fillStyle == FillStippled) << 29;
- b[1] |= blt_depth(drawable->depth) << 24;
- b[1] |= rop << 16;
+ b[1] = br13;
b[2] = (r->y + dy) << 16 | (r->x + dx);
b[3] = (r->y + r->height + dy) << 16 | (r->x + r->width + dx);
b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4,
@@ -6378,7 +6367,7 @@ sna_poly_fill_rect_stippled_1_blt(DrawablePtr drawable,
bx2 = (box.x2 - pat.x + 7) & ~7;
bw = (bx2 - bx1)/8;
bh = box.y2 - box.y1;
- bstride = ALIGN(bw, 8);
+ bstride = ALIGN(bw, 2);
DBG(("%s: rect (%d, %d)x(%d, %d), box (%d,%d),(%d,%d) stipple [%d,%d], pitch=%d, stride=%d\n",
__FUNCTION__,
@@ -6397,18 +6386,9 @@ sna_poly_fill_rect_stippled_1_blt(DrawablePtr drawable,
}
b = sna->kgem.batch + sna->kgem.nbatch;
- b[0] = XY_MONO_SRC_COPY_IMM | (5 + src_stride);
- if (drawable->bitsPerPixel == 32)
- b[0] |= 3 << 20;
+ b[0] = XY_MONO_SRC_COPY_IMM | (5 + src_stride) | br00;
b[0] |= ((box.x1 - pat.x) & 7) << 17;
- b[1] = priv->gpu_bo->pitch;
- if (sna->kgem.gen >= 40) {
- if (priv->gpu_bo->tiling)
- b[0] |= BLT_DST_TILED;
- b[1] >>= 2;
- }
- b[1] |= blt_depth(drawable->depth) << 24;
- b[1] |= rop << 16;
+ b[1] = br13;
b[2] = (box.y1 + dy) << 16 | (box.x1 + dx);
b[3] = (box.y2 + dy) << 16 | (box.x2 + dx);
b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4,
@@ -6423,18 +6403,17 @@ sna_poly_fill_rect_stippled_1_blt(DrawablePtr drawable,
sna->kgem.nbatch += 7 + src_stride;
dst = (uint8_t *)&b[7];
- bstride -= bw;
-
src_stride = stipple->devKind;
- src = (uint8_t*)stipple->devPrivate.ptr;
+ src = stipple->devPrivate.ptr;
src += (box.y1 - pat.y) * src_stride + bx1/8;
- src_stride -= bw;
+ src_stride -= bstride;
do {
- int i = bw;
+ int i = bstride;
do {
*dst++ = byte_reverse(*src++);
- } while (--i);
- dst += bstride;
+ *dst++ = byte_reverse(*src++);
+ i -= 2;
+ } while (i);
src += src_stride;
} while (--bh);
} else {
@@ -6453,35 +6432,24 @@ sna_poly_fill_rect_stippled_1_blt(DrawablePtr drawable,
break;
dst = ptr;
- bstride -= bw;
-
src_stride = stipple->devKind;
- src = (uint8_t*)stipple->devPrivate.ptr;
+ src = stipple->devPrivate.ptr;
src += (box.y1 - pat.y) * src_stride + bx1/8;
- src_stride -= bw;
+ src_stride -= bstride;
do {
- int i = bw;
+ int i = bstride;
do {
*dst++ = byte_reverse(*src++);
- } while (--i);
- dst += bstride;
+ *dst++ = byte_reverse(*src++);
+ i -= 2;
+ } while (i);
src += src_stride;
} while (--bh);
b = sna->kgem.batch + sna->kgem.nbatch;
- b[0] = XY_MONO_SRC_COPY;
- if (drawable->bitsPerPixel == 32)
- b[0] |= 3 << 20;
+ b[0] = XY_MONO_SRC_COPY | br00;
b[0] |= ((box.x1 - pat.x) & 7) << 17;
- b[1] = priv->gpu_bo->pitch;
- if (sna->kgem.gen >= 40) {
- if (priv->gpu_bo->tiling)
- b[0] |= BLT_DST_TILED;
- b[1] >>= 2;
- }
- b[1] |= (gc->fillStyle == FillStippled) << 29;
- b[1] |= blt_depth(drawable->depth) << 24;
- b[1] |= rop << 16;
+ b[1] = br13;
b[2] = (box.y1 + dy) << 16 | (box.x1 + dx);
b[3] = (box.y2 + dy) << 16 | (box.x2 + dx);
b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4,
@@ -6539,7 +6507,7 @@ sna_poly_fill_rect_stippled_1_blt(DrawablePtr drawable,
bx2 = (box.x2 - pat.x + 7) & ~7;
bw = (bx2 - bx1)/8;
bh = box.y2 - box.y1;
- bstride = ALIGN(bw, 8);
+ bstride = ALIGN(bw, 2);
DBG(("%s: rect (%d, %d)x(%d, %d), box (%d,%d),(%d,%d) stipple [%d,%d]\n",
__FUNCTION__,
@@ -6547,68 +6515,100 @@ sna_poly_fill_rect_stippled_1_blt(DrawablePtr drawable,
box.x1, box.y1, box.x2, box.y2,
bx1, bx2));
- if (!kgem_check_batch(&sna->kgem, 8) ||
- !kgem_check_bo_fenced(&sna->kgem, priv->gpu_bo, NULL) ||
- !kgem_check_reloc(&sna->kgem, 2)) {
- _kgem_submit(&sna->kgem);
- _kgem_set_mode(&sna->kgem, KGEM_BLT);
- }
+ src_stride = bstride*bh;
+ if (src_stride <= 128) {
+ src_stride = ALIGN(src_stride, 8) / 4;
+ if (!kgem_check_batch(&sna->kgem, 7+src_stride) ||
+ !kgem_check_bo_fenced(&sna->kgem, priv->gpu_bo, NULL) ||
+ !kgem_check_reloc(&sna->kgem, 1)) {
+ _kgem_submit(&sna->kgem);
+ _kgem_set_mode(&sna->kgem, KGEM_BLT);
+ }
- upload = kgem_create_buffer(&sna->kgem,
- bstride*bh,
- KGEM_BUFFER_WRITE,
- &ptr);
- if (!upload)
- break;
+ b = sna->kgem.batch + sna->kgem.nbatch;
+ b[0] = XY_MONO_SRC_COPY_IMM | (5 + src_stride) | br00;
+ b[0] |= ((box.x1 - pat.x) & 7) << 17;
+ b[1] = br13;
+ b[2] = (box.y1 + dy) << 16 | (box.x1 + dx);
+ b[3] = (box.y2 + dy) << 16 | (box.x2 + dx);
+ b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4,
+ priv->gpu_bo,
+ I915_GEM_DOMAIN_RENDER << 16 |
+ I915_GEM_DOMAIN_RENDER |
+ KGEM_RELOC_FENCED,
+ 0);
+ b[5] = gc->bgPixel;
+ b[6] = gc->fgPixel;
- dst = ptr;
- bstride -= bw;
+ sna->kgem.nbatch += 7 + src_stride;
- src_stride = stipple->devKind;
- src = (uint8_t*)stipple->devPrivate.ptr;
- src += (box.y1 - pat.y) * src_stride + bx1/8;
- src_stride -= bw;
- do {
- int i = bw;
+ dst = (uint8_t *)&b[7];
+ src_stride = stipple->devKind;
+ src = stipple->devPrivate.ptr;
+ src += (box.y1 - pat.y) * src_stride + bx1/8;
+ src_stride -= bstride;
do {
- *dst++ = byte_reverse(*src++);
- } while (--i);
- dst += bstride;
- src += src_stride;
- } while (--bh);
+ int i = bstride;
+ do {
+ *dst++ = byte_reverse(*src++);
+ *dst++ = byte_reverse(*src++);
+ i -= 2;
+ } while (i);
+ src += src_stride;
+ } while (--bh);
+ } else {
+ if (!kgem_check_batch(&sna->kgem, 8) ||
+ !kgem_check_bo_fenced(&sna->kgem, priv->gpu_bo, NULL) ||
+ !kgem_check_reloc(&sna->kgem, 2)) {
+ _kgem_submit(&sna->kgem);
+ _kgem_set_mode(&sna->kgem, KGEM_BLT);
+ }
- b = sna->kgem.batch + sna->kgem.nbatch;
- b[0] = XY_MONO_SRC_COPY;
- if (drawable->bitsPerPixel == 32)
- b[0] |= 3 << 20;
- b[0] |= ((box.x1 - pat.x) & 7) << 17;
- b[1] = priv->gpu_bo->pitch;
- if (sna->kgem.gen >= 40) {
- if (priv->gpu_bo->tiling)
- b[0] |= BLT_DST_TILED;
- b[1] >>= 2;
- }
- b[1] |= (gc->fillStyle == FillStippled) << 29;
- b[1] |= blt_depth(drawable->depth) << 24;
- b[1] |= rop << 16;
- b[2] = (box.y1 + dy) << 16 | (box.x1 + dx);
- b[3] = (box.y2 + dy) << 16 | (box.x2 + dx);
- b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4,
- priv->gpu_bo,
- I915_GEM_DOMAIN_RENDER << 16 |
- I915_GEM_DOMAIN_RENDER |
- KGEM_RELOC_FENCED,
- 0);
- b[5] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 5,
- upload,
- I915_GEM_DOMAIN_RENDER << 16 |
- KGEM_RELOC_FENCED,
- 0);
- b[6] = gc->bgPixel;
- b[7] = gc->fgPixel;
+ upload = kgem_create_buffer(&sna->kgem,
+ bstride*bh,
+ KGEM_BUFFER_WRITE,
+ &ptr);
+ if (!upload)
+ break;
- sna->kgem.nbatch += 8;
- kgem_bo_destroy(&sna->kgem, upload);
+ dst = ptr;
+ src_stride = stipple->devKind;
+ src = stipple->devPrivate.ptr;
+ src += (box.y1 - pat.y) * src_stride + bx1/8;
+ src_stride -= bstride;
+ do {
+ int i = bstride;
+ do {
+ *dst++ = byte_reverse(*src++);
+ *dst++ = byte_reverse(*src++);
+ i -= 2;
+ } while (i);
+ src += src_stride;
+ } while (--bh);
+
+ b = sna->kgem.batch + sna->kgem.nbatch;
+ b[0] = XY_MONO_SRC_COPY | br00;
+ b[0] |= ((box.x1 - pat.x) & 7) << 17;
+ b[1] = br13;
+ b[2] = (box.y1 + dy) << 16 | (box.x1 + dx);
+ b[3] = (box.y2 + dy) << 16 | (box.x2 + dx);
+ b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4,
+ priv->gpu_bo,
+ I915_GEM_DOMAIN_RENDER << 16 |
+ I915_GEM_DOMAIN_RENDER |
+ KGEM_RELOC_FENCED,
+ 0);
+ b[5] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 5,
+ upload,
+ I915_GEM_DOMAIN_RENDER << 16 |
+ KGEM_RELOC_FENCED,
+ 0);
+ b[6] = gc->bgPixel;
+ b[7] = gc->fgPixel;
+
+ sna->kgem.nbatch += 8;
+ kgem_bo_destroy(&sna->kgem, upload);
+ }
}
} while (--n);
commit 3620cd2d157f3d81ccb76bce2ab813bd1e058878
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Tue Nov 8 11:25:14 2011 +0000
sna: Begin hooking up valgrind/memcheck
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
diff --git a/src/sna/compiler.h b/src/sna/compiler.h
index 0b11310..2c8b43d 100644
--- a/src/sna/compiler.h
+++ b/src/sna/compiler.h
@@ -40,4 +40,12 @@
#define fastcall
#endif
+#ifdef HAVE_VALGRIND_H
+#define VG(x) x
+#else
+#define VG(x)
+#endif
+
+#define VG_CLEAR(s) VG(memset(&s, 0, sizeof(s)))
+
#endif /* _SNA_COMPILER_H_ */
diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index 75e7533..8ef5783 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -111,6 +111,7 @@ static int gem_set_tiling(int fd, uint32_t handle, int tiling, int stride)
if (DBG_NO_TILING)
return I915_TILING_NONE;
+ VG_CLEAR(set_tiling);
do {
set_tiling.handle = handle;
set_tiling.tiling_mode = tiling;
@@ -130,6 +131,7 @@ static void *gem_mmap(int fd, uint32_t handle, int size, int prot)
DBG(("%s(handle=%d, size=%d, prot=%s)\n", __FUNCTION__,
handle, size, prot & PROT_WRITE ? "read/write" : "read-only"));
+ VG_CLEAR(mmap_arg);
mmap_arg.handle = handle;
if (drmIoctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg)) {
assert(0);
@@ -142,6 +144,7 @@ static void *gem_mmap(int fd, uint32_t handle, int size, int prot)
ptr = NULL;
}
+ VG_CLEAR(set_domain);
set_domain.handle = handle;
set_domain.read_domains = I915_GEM_DOMAIN_GTT;
set_domain.write_domain = prot & PROT_WRITE ? I915_GEM_DOMAIN_GTT : 0;
@@ -159,6 +162,7 @@ static int gem_write(int fd, uint32_t handle,
DBG(("%s(handle=%d, offset=%d, len=%d)\n", __FUNCTION__,
handle, offset, length));
+ VG_CLEAR(pwrite);
pwrite.handle = handle;
pwrite.offset = offset;
pwrite.size = length;
@@ -174,6 +178,7 @@ static int gem_read(int fd, uint32_t handle, const void *dst,
DBG(("%s(handle=%d, len=%d)\n", __FUNCTION__,
handle, length));
+ VG_CLEAR(pread);
pread.handle = handle;
pread.offset = offset;
pread.size = length;
@@ -186,6 +191,7 @@ kgem_busy(struct kgem *kgem, int handle)
{
struct drm_i915_gem_busy busy;
+ VG_CLEAR(busy);
busy.handle = handle;
busy.busy = !kgem->wedged;
(void)drmIoctl(kgem->fd, DRM_IOCTL_I915_GEM_BUSY, &busy);
@@ -215,6 +221,7 @@ static uint32_t gem_create(int fd, int size)
assert((size & (PAGE_SIZE-1)) == 0);
#endif
+ VG_CLEAR(create);
create.handle = 0;
create.size = size;
(void)drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create);
@@ -228,6 +235,7 @@ gem_madvise(int fd, uint32_t handle, uint32_t state)
struct drm_i915_gem_madvise madv;
int ret;
+ VG_CLEAR(madv);
madv.handle = handle;
madv.madv = state;
madv.retained = 1;
@@ -241,6 +249,7 @@ static void gem_close(int fd, uint32_t handle)
{
struct drm_gem_close close;
+ VG_CLEAR(close);
close.handle = handle;
(void)drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &close);
}
@@ -347,11 +356,12 @@ void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, int gen)
if (!DBG_NO_VMAP) {
drm_i915_getparam_t gp;
+ v = 0;
+ VG_CLEAR(gp);
gp.param = I915_PARAM_HAS_VMAP;
gp.value = &v;
- kgem->has_vmap =
- drmIoctl(kgem->fd, DRM_IOCTL_I915_GETPARAM, &gp) == 0 &&
- v > 0;
+ drmIoctl(kgem->fd, DRM_IOCTL_I915_GETPARAM, &gp);
+ kgem->has_vmap = v > 0;
}
#endif
DBG(("%s: using vmap=%d\n", __FUNCTION__, kgem->has_vmap));
@@ -360,16 +370,19 @@ void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, int gen)
if (!DBG_NO_RELAXED_FENCING) {
drm_i915_getparam_t gp;
+ v = 0;
+ VG_CLEAR(gp);
gp.param = I915_PARAM_HAS_RELAXED_FENCING;
gp.value = &v;
- if (drmIoctl(kgem->fd, DRM_IOCTL_I915_GETPARAM, &gp) == 0)
- kgem->has_relaxed_fencing = v > 0;
+ drmIoctl(kgem->fd, DRM_IOCTL_I915_GETPARAM, &gp);
+ kgem->has_relaxed_fencing = v > 0;
}
} else
kgem->has_relaxed_fencing = 1;
DBG(("%s: has relaxed fencing=%d\n", __FUNCTION__,
kgem->has_relaxed_fencing));
+ VG_CLEAR(aperture);
aperture.aper_size = 64*1024*1024;
(void)drmIoctl(fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture);
@@ -392,6 +405,7 @@ void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, int gen)
DBG(("%s: max object size %d\n", __FUNCTION__, kgem->max_object_size));
v = 8;
+ VG_CLEAR(gp);
gp.param = I915_PARAM_NUM_FENCES_AVAIL;
gp.value = &v;
(void)drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
@@ -959,6 +973,7 @@ void _kgem_submit(struct kgem *kgem)
struct drm_i915_gem_execbuffer2 execbuf;
int ret;
+ VG_CLEAR(execbuf);
execbuf.buffers_ptr = (uintptr_t)kgem->exec;
execbuf.buffer_count = kgem->nexec;
execbuf.batch_start_offset = 0;
@@ -1045,6 +1060,7 @@ void _kgem_submit(struct kgem *kgem)
struct drm_i915_gem_set_domain set_domain;
int ret;
+ VG_CLEAR(set_domain);
set_domain.handle = handle;
set_domain.read_domains = I915_GEM_DOMAIN_GTT;
set_domain.write_domain = I915_GEM_DOMAIN_GTT;
@@ -1181,6 +1197,7 @@ void kgem_cleanup_cache(struct kgem *kgem)
struct kgem_request,
list);
+ VG_CLEAR(set_domain);
set_domain.handle = rq->bo->handle;
set_domain.read_domains = I915_GEM_DOMAIN_GTT;
set_domain.write_domain = I915_GEM_DOMAIN_GTT;
@@ -1258,7 +1275,7 @@ struct kgem_bo *kgem_create_for_name(struct kgem *kgem, uint32_t name)
DBG(("%s(name=%d)\n", __FUNCTION__, name));
- memset(&open_arg, 0, sizeof(open_arg));
+ VG_CLEAR(open_arg);
open_arg.name = name;
if (drmIoctl(kgem->fd, DRM_IOCTL_GEM_OPEN, &open_arg))
return NULL;
@@ -1772,7 +1789,7 @@ uint32_t kgem_bo_flink(struct kgem *kgem, struct kgem_bo *bo)
struct drm_gem_flink flink;
int ret;
- memset(&flink, 0, sizeof(flink));
+ VG_CLEAR(flink);
flink.handle = bo->handle;
ret = drmIoctl(kgem->fd, DRM_IOCTL_GEM_FLINK, &flink);
if (ret)
@@ -1791,6 +1808,7 @@ static uint32_t gem_vmap(int fd, void *ptr, int size, int read_only)
{
struct drm_i915_gem_vmap vmap;
+ VG_CLEAR(vmap);
vmap.user_ptr = (uintptr_t)ptr;
vmap.user_size = size;
vmap.flags = 0;
@@ -1859,6 +1877,7 @@ void kgem_bo_sync(struct kgem *kgem, struct kgem_bo *bo, bool for_write)
if (for_write ? bo->cpu_write : bo->cpu_read)
return;
+ VG_CLEAR(set_domain);
set_domain.handle = bo->handle;
set_domain.read_domains = I915_GEM_DOMAIN_CPU;
set_domain.write_domain = for_write ? I915_GEM_DOMAIN_CPU : 0;
@@ -1883,6 +1902,8 @@ void kgem_sync(struct kgem *kgem)
rq = list_first_entry(&kgem->requests,
struct kgem_request,
list);
+
+ VG_CLEAR(set_domain);
set_domain.handle = rq->bo->handle;
set_domain.read_domains = I915_GEM_DOMAIN_GTT;
set_domain.write_domain = I915_GEM_DOMAIN_GTT;
diff --git a/src/sna/sna_display.c b/src/sna/sna_display.c
index d44d6f8..e8d2c2a 100644
--- a/src/sna/sna_display.c
+++ b/src/sna/sna_display.c
@@ -146,6 +146,7 @@ static uint32_t gem_create(int fd, int size)
{
struct drm_i915_gem_create create;
+ VG_CLEAR(create);
create.handle = 0;
create.size = ALIGN(size, 4096);
(void)drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create);
@@ -157,6 +158,7 @@ static void gem_close(int fd, uint32_t handle)
{
struct drm_gem_close close;
+ VG_CLEAR(close);
close.handle = handle;
(void)drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &close);
}
@@ -483,7 +485,7 @@ static struct kgem_bo *sna_create_bo_for_fbcon(struct sna *sna,
* using a normal bo and so that when we call gem_close on it we
* delete our reference and not fbcon's!
*/
- memset(&flink, 0, sizeof(flink));
+ VG_CLEAR(flink);
flink.handle = fbcon->handle;
ret = drmIoctl(sna->kgem.fd, DRM_IOCTL_GEM_FLINK, &flink);
if (ret)
@@ -707,6 +709,7 @@ sna_crtc_load_cursor_argb(xf86CrtcPtr crtc, CARD32 *image)
struct sna_crtc *sna_crtc = crtc->driver_private;
struct drm_i915_gem_pwrite pwrite;
+ VG_CLEAR(pwrite);
pwrite.handle = sna_crtc->cursor;
pwrite.offset = 0;
pwrite.size = 64*64*4;
@@ -859,6 +862,7 @@ sna_crtc_init(ScrnInfoPtr scrn, struct sna_mode *mode, int num)
sna_crtc->id = mode_crtc->crtc_id;
drmModeFreeCrtc(mode_crtc);
+ VG_CLEAR(get_pipe);
get_pipe.pipe = 0;
get_pipe.crtc_id = sna_crtc->id;
drmIoctl(sna->kgem.fd,
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