xf86-video-intel: 4 commits - src/sna/gen5_render.c src/sna/gen6_render.c src/sna/sna_composite.c src/sna/sna_damage.c src/sna/sna_damage.h src/sna/sna_render.c

Chris Wilson ickle at kemper.freedesktop.org
Tue Jun 7 00:59:14 PDT 2011


 src/sna/gen5_render.c   |   15 ++-------------
 src/sna/gen6_render.c   |    2 ++
 src/sna/sna_composite.c |   10 ++++++++++
 src/sna/sna_damage.c    |   14 +++++++++-----
 src/sna/sna_damage.h    |    4 ++--
 src/sna/sna_render.c    |   33 +++++++++++++++++++++++++++++----
 6 files changed, 54 insertions(+), 24 deletions(-)

New commits:
commit 790f90a277ff2a6fbb615b8cd3c06faa0d549c41
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Tue Jun 7 08:18:30 2011 +0100

    sna/gen6: Initialise a couple more composite op members for copy_boxes
    
    Valgrind detected that I missed initialised a couple of fields for
    use with the generic state emission paths:
    
    ==28683== Conditional jump or move depends on uninitialised value(s)
    ==28683==    at 0x83BE646: gen6_get_blend (gen6_render.c:251)
    ==28683==    by 0x83BF769: gen6_emit_state (gen6_render.c:818)
    ==28683==    by 0x83C38ED: gen6_emit_copy_state (gen6_render.c:2280)
    ==28683==    by 0x83C3C89: gen6_render_copy_boxes (gen6_render.c:2356)
    ==28683== Conditional jump or move depends on uninitialised value(s)
    ==28683==    at 0x83C15C3: gen6_rectangle_begin (gen6_render.c:1458)
    ==28683==    by 0x83C177D: gen6_get_rectangles (gen6_render.c:1502)
    ==28683==    by 0x83C3D16: gen6_render_copy_boxes (gen6_render.c:2363)
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/gen6_render.c b/src/sna/gen6_render.c
index 56aaadc..1cc30b2 100644
--- a/src/sna/gen6_render.c
+++ b/src/sna/gen6_render.c
@@ -2339,6 +2339,8 @@ gen6_render_copy_boxes(struct sna *sna, uint8_t alu,
 
 	tmp.is_affine = TRUE;
 	tmp.floats_per_vertex = 3;
+	tmp.has_component_alpha = 0;
+	tmp.need_magic_ca_pass = 0;
 
 	tmp.u.gen6.wm_kernel = GEN6_WM_KERNEL_NOMASK;
 	tmp.u.gen6.nr_surfaces = 2;
commit 4e443cbef589e016d085e8023677f47c1f01a858
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Tue Jun 7 00:24:17 2011 +0100

    sna: Add some more debug commentary to render picture source migration
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/sna_damage.c b/src/sna/sna_damage.c
index 21af2d0..63e8341 100644
--- a/src/sna/sna_damage.c
+++ b/src/sna/sna_damage.c
@@ -614,7 +614,7 @@ fastcall struct sna_damage *_sna_damage_subtract_box(struct sna_damage *damage,
 #endif
 
 static int _sna_damage_contains_box(struct sna_damage *damage,
-				    const BoxPtr box)
+				    const BoxRec *box)
 {
 	if (!damage)
 		return PIXMAN_REGION_OUT;;
@@ -625,12 +625,12 @@ static int _sna_damage_contains_box(struct sna_damage *damage,
 	if (damage->n)
 		__sna_damage_reduce(damage);
 
-	return pixman_region_contains_rectangle(&damage->region, box);
+	return pixman_region_contains_rectangle(&damage->region, (BoxPtr)box);
 }
 
 #if DEBUG_DAMAGE
 int sna_damage_contains_box(struct sna_damage *damage,
-			    const BoxPtr box)
+			    const BoxRec *box)
 {
 	char damage_buf[1000];
 	int ret;
@@ -640,13 +640,17 @@ int sna_damage_contains_box(struct sna_damage *damage,
 	     box->x1, box->y1, box->x2, box->y2));
 
 	ret = _sna_damage_contains_box(damage, box);
-	ErrorF("  = %d\n", ret);
+	ErrorF("  = %d", ret);
+	if (ret)
+		ErrorF(" [(%d, %d), (%d, %d)...]",
+		       box->x1, box->y1, box->x2, box->y2);
+	ErrorF("\n");
 
 	return ret;
 }
 #else
 int sna_damage_contains_box(struct sna_damage *damage,
-			    const BoxPtr box)
+			    const BoxRec *box)
 {
 	return _sna_damage_contains_box(damage, box);
 }
diff --git a/src/sna/sna_damage.h b/src/sna/sna_damage.h
index 0b33571..c5dfa7f 100644
--- a/src/sna/sna_damage.h
+++ b/src/sna/sna_damage.h
@@ -53,7 +53,7 @@ static inline void sna_damage_subtract(struct sna_damage **damage,
 fastcall struct sna_damage *_sna_damage_subtract_box(struct sna_damage *damage,
 						     const BoxRec *box);
 static inline void sna_damage_subtract_box(struct sna_damage **damage,
-					   BoxPtr box)
+					   const BoxRec *box)
 {
 	*damage = _sna_damage_subtract_box(*damage, box);
 }
@@ -62,7 +62,7 @@ Bool sna_damage_intersect(struct sna_damage *damage,
 			  RegionPtr region, RegionPtr result);
 
 int sna_damage_contains_box(struct sna_damage *damage,
-			    const BoxPtr box);
+			    const BoxRec *box);
 
 int sna_damage_get_boxes(struct sna_damage *damage, BoxPtr *boxes);
 
diff --git a/src/sna/sna_render.c b/src/sna/sna_render.c
index b6a44d2..d7d7e5f 100644
--- a/src/sna/sna_render.c
+++ b/src/sna/sna_render.c
@@ -238,18 +238,26 @@ void no_render_init(struct sna *sna)
 }
 
 static Bool
-move_to_gpu(PixmapPtr pixmap, const BoxPtr box)
+move_to_gpu(PixmapPtr pixmap, const BoxRec *box)
 {
 	struct sna_pixmap *priv;
 	int count, w, h;
 
-	if (pixmap->usage_hint)
+	if (pixmap->usage_hint) {
+		DBG(("%s: not migrating pixmap due to usage_hint=%d\n",
+		     __FUNCTION__, pixmap->usage_hint));
 		return FALSE;
+	}
 
 	w = box->x2 - box->x1;
 	h = box->y2 - box->y1;
-	if (w == pixmap->drawable.width || h == pixmap->drawable.height)
+	if (w == pixmap->drawable.width || h == pixmap->drawable.height) {
+		DBG(("%s: migrating whole pixmap (%dx%d) for source\n",
+		     __FUNCTION__,
+		     pixmap->drawble->width,
+		     pixmap->drawable.height));
 		return TRUE;
+	}
 
 	count = SOURCE_BIAS;
 	priv = sna_pixmap(pixmap);
@@ -267,7 +275,7 @@ move_to_gpu(PixmapPtr pixmap, const BoxPtr box)
 }
 
 static Bool
-texture_is_cpu(PixmapPtr pixmap, const BoxPtr box)
+_texture_is_cpu(PixmapPtr pixmap, const BoxRec *box)
 {
 	struct sna_pixmap *priv = sna_pixmap(pixmap);
 
@@ -289,6 +297,23 @@ texture_is_cpu(PixmapPtr pixmap, const BoxPtr box)
 	return sna_damage_contains_box(priv->cpu_damage, box) != PIXMAN_REGION_OUT;
 }
 
+#if DEBUG_RENDER
+static Bool
+texture_is_cpu(PixmapPtr pixmap, const BoxRec *box)
+{
+	Bool ret = _texture_is_cpu(pixmap, box);
+	ErrorF("%s(pixmap=%p, box=((%d, %d), (%d, %d)) = %d\n",
+	       __FUNCTION__, pixmap, box, ret);
+	return ret;
+}
+#else
+static Bool
+texture_is_cpu(PixmapPtr pixmap, const BoxRec *box)
+{
+	return _texture_is_cpu(pixmap, box);
+}
+#endif
+
 static struct kgem_bo *upload(struct sna *sna,
 			      struct sna_composite_channel *channel,
 			      PixmapPtr pixmap,
commit 367298c5109b47fa4961a60fa3cb454c800f02c3
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Mon Jun 6 23:21:09 2011 +0100

    sna: Subtract the Solid RenderFillRectangles from CPU damage
    
    ... and so avoid having to move it the GPU, as seen in the wild. It
    looks like I will actually need to handle mixed Render/Core operations
    on the frontbuffer.
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/sna_composite.c b/src/sna/sna_composite.c
index 27b1ff3..1640309 100644
--- a/src/sna/sna_composite.c
+++ b/src/sna/sna_composite.c
@@ -639,6 +639,16 @@ sna_composite_rectangles(CARD8		 op,
 		goto fallback;
 	}
 
+	/* If we going to be overwriting any CPU damage with a subsequent
+	 * operation, then we may as well delete it without moving it
+	 * first to the GPU.
+	 */
+	if (op == PictOpSrc || op == PictOpClear) {
+		priv = sna_pixmap_attach(pixmap);
+		if (priv && !priv->gpu_only)
+			sna_damage_subtract(&priv->cpu_damage, &region);
+	}
+
 	priv = sna_pixmap_move_to_gpu(pixmap);
 	if (priv == NULL) {
 		DBG(("%s: fallback due to no GPU bo\n", __FUNCTION__));
commit 62e4266b4dc9b5c3d165aca980738fa777a0f259
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Mon Jun 6 16:20:38 2011 +0100

    sna/gen5: Only emit the non-pipelined op after BLT commands
    
    We were always terminating the batch with the non-pipelined op, and not
    just at the end of a BLT sequence.
    
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

diff --git a/src/sna/gen5_render.c b/src/sna/gen5_render.c
index 72afe98..eea0dd0 100644
--- a/src/sna/gen5_render.c
+++ b/src/sna/gen5_render.c
@@ -2540,22 +2540,11 @@ static void
 gen5_render_context_switch(struct sna *sna,
 			   int new_mode)
 {
-	if (sna->kgem.mode == 0)
-		return;
-
 	/* Ironlake has a limitation that a 3D or Media command can't
 	 * be the first command after a BLT, unless it's
-	 * non-pipelined.  Instead of trying to track it and emit a
-	 * command at the right time, we just emit a dummy
-	 * non-pipelined 3D instruction after each blit.
+	 * non-pipelined.
 	 */
-	if (new_mode == KGEM_BLT) {
-#if 0
-		OUT_BATCH(MI_FLUSH |
-			  MI_STATE_INSTRUCTION_CACHE_FLUSH |
-			  MI_INHIBIT_RENDER_CACHE_FLUSH);
-#endif
-	} else {
+	if (sna->kgem.mode == KGEM_BLT) {
 		OUT_BATCH(CMD_POLY_STIPPLE_OFFSET << 16);
 		OUT_BATCH(0);
 	}


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